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March 9, 2026
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stm32n6 PPS in (ETH_PTP_AUX_TS)

  • March 9, 2026
  • 6 replies
  • 513 views

Hello,

I need to sync the stm32n6 system timer to be used as PTP master. According to the Reference Manual there is a PPS input that can generate timestamp and interrupt: 

ETH_PTP_AUX_TS

But according to the RM it is not in all models, and I can't find which models it exists and how to map it to external IO.

 

Thanks,

Noam.

 

Best answer by FBL

Hi @Noam_h 

I got the confirmation. You can sync the STM32N6 with internal signal connected to timer output trigger as I mentioned earlier. Here is the mapping to be added in reference manual :
 ptp_aux_ts_trig_i[0] (eth_ptp_trig0) connected internally with tim2_trgo
 ptp_aux_ts_trig_i[1] (eth_ptp_trig1) connected internally with tim3_trgo
 ptp_aux_ts_trig_i[2] (eth_ptp_trig2) not connected
 ptp_aux_ts_trig_i[3] (eth_ptp_trig3) connected internally with fdcan1_tmp

 

6 replies

Technical Moderator
March 9, 2026

Hi @Noam_h 

I assume ETH_PTP_AUX_TS are missing in STM32N6 datasheet. I will come back to you  ASAP.

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.Best regards,FBL
Noam_hAuthor
Associate
March 9, 2026

Thanks for the replay, ETH_PTP_AUX_TS is missing in the datasheet, and I couldn't find it in STM32cubeMX.

Thanks,

Noam.

Technical Moderator
March 11, 2026

Hi @Noam_h 

The issue is being tracked internally, and I cannot commit to a specific timeline officially for a valid pin.

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.Best regards,FBL
Noam_hAuthor
Associate
March 24, 2026

Hello @FBL ,

Any news,regarding the issue?

Tganks,

Noam

Noam_hAuthor
Associate
March 12, 2026

Hi @FBL

while I am waiting, can I use one of the internal eth_ptp_trig[3:0] as an input and one of the timers with PPS trigger in and a trigger out connected to the eth_ptp_trig? 

If so, the routing from the trigger out to eth_ptp_trig is also not documented.

Thanks,

Noam.

Technical Moderator
March 26, 2026

Hello  @Noam_h 

Yes, on STM32N6 you can use an internal trigger as the PTP auxiliary timestamp source: a timer can take your PPS on one of its inputs and generate a trigger output, which is then internally routed to the Ethernet PTP auxiliary snapshot engine.

However, the internal routing  is not yet explicitly documented in the public RM. I’m currently waiting for official confirmation on this mapping so that it can be clearly documented (via RM update and/or errata), and so that we can reference it confidently in designs. Internal ticket number CDM0060329 for internal use.

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.Best regards,FBL
FBLBest answer
Technical Moderator
March 31, 2026

Hi @Noam_h 

I got the confirmation. You can sync the STM32N6 with internal signal connected to timer output trigger as I mentioned earlier. Here is the mapping to be added in reference manual :
 ptp_aux_ts_trig_i[0] (eth_ptp_trig0) connected internally with tim2_trgo
 ptp_aux_ts_trig_i[1] (eth_ptp_trig1) connected internally with tim3_trgo
 ptp_aux_ts_trig_i[2] (eth_ptp_trig2) not connected
 ptp_aux_ts_trig_i[3] (eth_ptp_trig3) connected internally with fdcan1_tmp

 

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.Best regards,FBL
Noam_hAuthor
Associate
April 7, 2026

Thanks @FBL,

what about the  ETH_PTP_AUX_TS?

Thanks,

Noam.

Technical Moderator
April 7, 2026

Unfortunately ETH_PTP_AUX_TS is not mapped on all products. On STM32N6, it's mapped with no internal signal only with timer output trigger or FDCAN..

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.Best regards,FBL
Noam_hAuthor
Associate
April 7, 2026

Is it mapped to an external gpio?

Noam