32F417: Is there a spec for the 50MHz input signal on ETH_RMII_REF_CLK (PA1)

[PHolt.1]

I am giving it what I think is a reasonable waveform with < 2ns monotonic edges. It all works but I would like to make sure.

I posted waveforms here

https://www.eevblog.com/forum/microcontrollers/32f4-is-there-a-spec-on-the-50mhz-clock-from-the-eth-phy/

[waclawek.jan]

Discussed here https://www.eevblog.com/forum/microcontrollers/32f4-is-there-a-spec-on-the-50mhz-clock-from-the-eth-phy/