ADC Calibration Failure on STM32N657 Using ADC1 Channel 1
- June 22, 2025
- 2 replies
- 973 views
Dear STMicroelectronics Support Team,
I am encountering an issue with ADC calibration on the STM32N657 microcontroller. Despite multiple attempts, the calibration process consistently fails. Below are the details of my setup and observations for your reference:
Hardware Configuration:
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ADC: ADC1, Channel 1
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Reference Voltage:
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VREF+: External 1.8V (measured 1.76V)
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VREF-: Ground
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Other: Enabled ICache/DCache, GPIO, USART1, and system isolation.
Software Configuration:
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Initialization Code:
SCB_EnableICache();
SCB_EnableDCache();
HAL_Init();
MX_GPIO_Init();
MX_ADC1_Init();
MX_USART1_UART_Init();
SystemIsolation_Config();
// Debug: Check registers post-init
printf("Post-Init ADC_CR: 0x%08lX\r\n", hadc1.Instance->CR); // Output: 0x00000000
printf("Post-Init ADC_ISR: 0x%08lX\r\n", hadc1.Instance->ISR); // Output: 0x00000000
// Explicit MSP init (debug)
HAL_ADC_MspInit(&hadc1);
printf("Post-MSP ADC_CR: 0x%08lX\r\n", hadc1.Instance->CR); // Output: 0x00000000
printf("Post-MSP ADC_ISR: 0x%08lX\r\n", hadc1.Instance->ISR); // Output: 0x00000000
// Attempt calibration
HAL_StatusTypeDef status = HAL_ADCEx_Calibration_Start(&hadc1, ADC_SINGLE_ENDED);
if (status != HAL_OK) {
printf("Calibration Failed. CR: 0x%08lX, ISR: 0x%08lX\n",
hadc1.Instance->CR, hadc1.Instance->ISR); // CR: 0x00000001, ISR: 0x0000000B
while(1);
}
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Observed Behavior:
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Register States:
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After initialization, and remain , suggesting ADC is not enabled.ADC_CRADC_ISR0x00000000
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Post-calibration failure:
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ADC_CR = 0x00000001 (ADEN bit set, but no further activity).
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ADC_ISR = 0x0000000B (Flags: + + ).ADRDYEOSEOC
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Calibration Outcome:
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Always fails with .HAL_ERROR
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Questions:
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Why do and stay zero after initialization? Is the ADC not properly enabled?ADC_CRADC_ISR
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Could the external reference voltage (1.76V, slightly below nominal 1.8V) cause calibration failure?
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Are there known errata or configuration steps specific to STM32N657 for ADC calibration?
Additional Context:
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CubeMX Configuration:
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Single-ended mode, 12-bit resolution, software trigger.
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No DMA/IRQ, scan mode disabled.
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Troubleshooting Attempts:
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Verified clock configuration (ADC clock ≤ max limit).
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Checked VDDA/VREF+ stability with oscilloscope.
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I would greatly appreciate any insights or suggestions to resolve this issue. Please let me know if further details are required.
Best regards,
dw1 -
EDIT by ST Moderator: elaborate this post in English
