Bootloading Using Pattern 10

[EZamo.1]

Trying to figure out how to bootload the Stm32h745 using the BOOT0 and BOOT_ADDX. AN2606 / AN4938 says to use pattern 10, yet that shows the BOOT0 pin can be low OR high with the only difference being the ADDRX.

We're interested in only using the built-in rom bootloader to program M7/M4 via FDCAN and/or USART, preferably just using a discrete, to force in-system-programming.

Also, Is there a CAN utility (similar to serial Flasher-STM32) that can be used? I assume in the application it's necessary to specify the flash address of the core to program (M7 vs M4)?

Note: 0x1FFF0000 System Memory, 0x1FF09800 Bootloader for both cores.

[TDK]

The address to boot from for either BOOT0=0 or BOOT0=1 is configurable.

Is BOOT0=0? --> boot from BOOT_ADD0

Is BOOT0=1? --> boot from BOOT_ADD1

You need to decide which one you want to use to start the bootloader.

Typically, BOOT0=0 boots from flash (0x08000000) and BOOT0=1 boots from system memory (0x1FF00000). That is the default.

[EZamo.1]

Thanks, i didn't realize the jump addresses were configurable by programming the Option Bytes. Except for perhaps keeping the M4 in reset, I'd rather not mess with those bytes.

I found a utility to program via Can-bus. Doesn't seem to support the stm32h7 series.. but I think it might easily added.

https://github.com/marcinbor85/can-prog

What I'm unclear about is how the flash is shared between the 2 processors.. there's 2 flash banks (8000000-80fffff) and (8100000-81fffff), yet the programming manual for the M4 and M7 show the code space to be the same 0-1fffffff. How does this work?

[TDK]

> What I'm unclear about is how the flash is shared between the 2 processors.. 

The flash can be read/write by both processors. It's up to you to manage cache consistency and data access. Typically flash is used as read-only so it's not hard to do this.