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mmalex
Visitor II
December 1, 2019
Solved

can you clarify some of the documentation eg SPI size parameter doesnt specify bytes or words

  • December 1, 2019
  • 3 replies
  • 1033 views

This is a documentation bug/request really, but I recently was trying out the HAL_SPI functions for the first time, and had set up the peripheral for 16 bit transfers.

The documentation for HAL_SPI_TransmitReceive and related functions, for several of the families, across several documents and pdfs found on the internet and ST's site, all simply say that the size parameter 'Size: amount of data to be sent and received'

I found a number of erroneous exmaples that use sizeof(buffer), as well as several question on this forum with incorrect information; for the record, from reading the HAL code, the size is measured in units of 16 bits (or whatever your SPI is configured for). while that makes total sense, I wish the docs made this clearer as it tripped me up - and many others. I was overrunning my buffer by a factor of 2, leading to bizarre behaviour, faults etc.

took a while to unpick.

For the DMA functions, I dont know yet if the size of the DMA transfer configuration (half word or word) matters... I will find out the hard way I guess, as the docs are silent on the matter :)

I hope this helps someone - SPI_Transmit size is measured in words, not bytes :)

(The same documentation scarcity is true for I2S and SAI peripherals also, for what it's worth... I haven't stumbed into other areas yet)

    This topic has been closed for replies.
    Best answer by S.Ma

    Actually there are at least 4 versions of the SPI IP.

    The original is 8 or 16 bits

    The V2 has programmable bit size

    The V3 has 32 bit FIFO, and that's where the way to write the DR has meaning, if SPI is 8 bit, writing 16 bit result in 2x8 bit sent.

    Only when focusing at performance (lowest clock frequency or lowest bus congestion) these things become under the vision range.

    3 replies

    S
    S.MaAnswer
    Visitor II
    December 1, 2019

    Actually there are at least 4 versions of the SPI IP.

    The original is 8 or 16 bits

    The V2 has programmable bit size

    The V3 has 32 bit FIFO, and that's where the way to write the DR has meaning, if SPI is 8 bit, writing 16 bit result in 2x8 bit sent.

    Only when focusing at performance (lowest clock frequency or lowest bus congestion) these things become under the vision range.

    M
    mmalexAuthor
    Visitor II
    December 1, 2019

    interesting! thanks for the extra information. I think that increases even more the need for more documentation around what the 'size' parameter means :) since it doesnt specify any detail at all at the moment.

    thanks!

    R
    RMcCa
    Visitor II
    December 1, 2019

    Another good reason to ditch hal and deal with the peripheral registers yourself. In the F7, one specifies the source and destination data width and the number of dma transfers. I don't know about how it behaves when the 2 data widths are different but in my code 8 half word(16 bit) dma spi reception works exactly as one might expect.​

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