Do I need to invalidate D-Cache after HAL_Flash_Program?

[rndkd1]

Hello,

 

I’m working with an STM32H723 MCU and have a question about Flash behavior when caches are enabled.

Both D-Cache and I-Cache are enabled, and I’m not using any additional MPU configuration.

 

I'm using D-Cache invalidate after a Flash erase operation.

Do I also need to invalidate the D-Cache after a Flash write?

 

Below is my current code. The D-Cache invalidate is commented out.

everything works fine, but I want to prevent any potential issues in the future.

 

static int32_t flash_write_words(uint32_t addr, uint32_t *data)
{
 volatile uint32_t *flash = (uint32_t *)addr;
 const uint32_t num_words = FLASH_NB_32BITWORD_IN_FLASHWORD;

 // check erased
 for (uint32_t i = 0; i < num_words; i++)
 {
 if (flash[i] != 0xFFFFFFFFU)
 {
 return -1;
 }
 }

 // write words
 if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_FLASHWORD, addr, (uint32_t)data) != HAL_OK)
 {
 return -1;
 }

 // SCB_InvalidateDCache_by_Addr((uint32_t *)addr, 32U);

 return 0;
}

 

[AScha.3]

No,

As the CPU doing this,no reason to clear the cache.

Cache is only a problem, if using DMA, because then there might be other data in RAM, than the CPU and it's cache expecting, because DMA changed it.

Or the other way, clean cache, because new data in cache and DMA should send it, but now the RAM still has old data, so it has to be updated.

As long as nothing else than the CPU works or changes data, no cache handling needed.

[rndkd1]

Thank you for the reply.

However, in the case of a Flash erase, the erase operation is not performed by the CPU.
If I don’t invalidate the D-Cache after erase, reading the same address still returns the old cached data.

So even without using DMA, cache coherency issues can still occur.

[AScha.3]

Oh, i was thinking just on Flash -> program (then anyway reset/restart).

But you want use part of flash memory for data like an eeprom - right ?

So the flash erase -> block with data is same as a DMA action: "someone else" than the core modifies memory.

This case needs invalidate cache for the (by "erase" ) modified memory area.

 

from rm H743:

 

And dont forget: erase is for a block...