ethernet interrupt not working

[root437]

I send an ethernet packet to MAC address 00:80:E1:00:00:00 but no interrupt occurs in STM

Enabled Ethernet interrupts in CubeMX.

What could be wrong?

Code:

/* USER CODE BEGIN Header */
/**
 ******************************************************************************
 * @file : main.c
 * @brief : Main program body
 ******************************************************************************
 * @attention
 *
 * Copyright (c) 2023 STMicroelectronics.
 * All rights reserved.
 *
 * This software is licensed under terms that can be found in the LICENSE file
 * in the root directory of this software component.
 * If no LICENSE file comes with this software, it is provided AS-IS.
 *
 ******************************************************************************
 */
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "string.h"
 
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
 
/* USER CODE END Includes */
 
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
 
/* USER CODE END PTD */
 
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
 
/* USER CODE END PD */
 
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
 
/* USER CODE END PM */
 
/* Private variables ---------------------------------------------------------*/
#if defined ( __ICCARM__ ) /*!< IAR Compiler */
#pragma location=0x30000000
ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
#pragma location=0x30000200
ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
 
#elif defined ( __CC_ARM ) /* MDK ARM Compiler */
 
__attribute__((at(0x30000000))) ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
__attribute__((at(0x30000200))) ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
 
#elif defined ( __GNUC__ ) /* GNU Compiler */
ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT] __attribute__((section(".RxDecripSection"))); /* Ethernet Rx DMA Descriptors */
ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT] __attribute__((section(".TxDecripSection"))); /* Ethernet Tx DMA Descriptors */
 
#endif
 
ETH_TxPacketConfig TxConfig;
 
ETH_HandleTypeDef heth;
 
/* USER CODE BEGIN PV */
 
int flag = 0;
ETH_MACFilterConfigTypeDef 	macfilter;
uint8_t 		 rxBuffer[152028] = {0};
 
unsigned char txbuf[256+14];
ETH_TxDescListTypeDef * txdesc;
 
unsigned char rxbuf[256+14] ={0};
ETH_DMADescTypeDef rxdesc;
 
 
 ETH_BufferTypeDef txBuffer;
/* USER CODE END PV */
 
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void MPU_Config(void);
static void MX_GPIO_Init(void);
static void MX_ETH_Init(void);
/* USER CODE BEGIN PFP */
 
/* USER CODE END PFP */
 
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
 
/* USER CODE END 0 */
 
/**
 * @brief The application entry point.
 * @retval int
 */
int main(void)
{
 /* USER CODE BEGIN 1 */
 
 /* USER CODE END 1 */
 
 /* MPU Configuration--------------------------------------------------------*/
 MPU_Config();
 
 /* MCU Configuration--------------------------------------------------------*/
 
 /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
 HAL_Init();
 
 /* USER CODE BEGIN Init */
 
 /* USER CODE END Init */
 
 /* Configure the system clock */
 SystemClock_Config();
 
 /* USER CODE BEGIN SysInit */
 
 /* USER CODE END SysInit */
 
 /* Initialize all configured peripherals */
 MX_GPIO_Init();
 MX_ETH_Init();
 /* USER CODE BEGIN 2 */
 
 /* USER CODE END 2 */
 
 /* Infinite loop */
 /* USER CODE BEGIN WHILE */
 while (1)
 {
 
	 if (flag == 1)
	 		 {
	 		 flag = 0;
	 		 }
	 	 HAL_Delay(1000);
 /* USER CODE END WHILE */
 
 /* USER CODE BEGIN 3 */
 }
 /* USER CODE END 3 */
}
 
/**
 * @brief System Clock Configuration
 * @retval None
 */
void SystemClock_Config(void)
{
 RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 
 /** Supply configuration update enable
 */
 HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
 
 /** Configure the main internal regulator output voltage
 */
 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
 
 while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
 
 /** Initializes the RCC Oscillators according to the specified parameters
 * in the RCC_OscInitTypeDef structure.
 */
 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
 RCC_OscInitStruct.HSIState = RCC_HSI_DIV1;
 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 {
 Error_Handler();
 }
 
 /** Initializes the CPU, AHB and APB buses clocks
 */
 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
 |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
 RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
 RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1;
 RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV1;
 RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV1;
 RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV1;
 RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV1;
 
 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
 {
 Error_Handler();
 }
}
 
/**
 * @brief ETH Initialization Function
 * @param None
 * @retval None
 */
static void MX_ETH_Init(void)
{
 
 /* USER CODE BEGIN ETH_Init 0 */
 
 /* USER CODE END ETH_Init 0 */
 
 static uint8_t MACAddr[6];
 
 /* USER CODE BEGIN ETH_Init 1 */
 
 /* USER CODE END ETH_Init 1 */
 heth.Instance = ETH;
 MACAddr[0] = 0x00;
 MACAddr[1] = 0x80;
 MACAddr[2] = 0xE1;
 MACAddr[3] = 0x00;
 MACAddr[4] = 0x00;
 MACAddr[5] = 0x00;
 heth.Init.MACAddr = &MACAddr[0];
 heth.Init.MediaInterface = HAL_ETH_RMII_MODE;
 heth.Init.TxDesc = DMATxDscrTab;
 heth.Init.RxDesc = DMARxDscrTab;
 heth.Init.RxBuffLen = 1524;
 
 /* USER CODE BEGIN MACADDRESS */
 
 /* USER CODE END MACADDRESS */
 
 if (HAL_ETH_Init(&heth) != HAL_OK)
 {
 Error_Handler();
 }
 
 memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig));
 TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD;
 TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC;
 TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT;
 /* USER CODE BEGIN ETH_Init 2 */
 
 	HAL_ETH_MspInit(&heth);
 HAL_ETH_Start_IT(&heth);
 HAL_ETH_IRQHandler(&heth);
 
 
 /* USER CODE END ETH_Init 2 */
 
}
 
/**
 * @brief GPIO Initialization Function
 * @param None
 * @retval None
 */
static void MX_GPIO_Init(void)
{
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
 
 /* GPIO Ports Clock Enable */
 __HAL_RCC_GPIOC_CLK_ENABLE();
 __HAL_RCC_GPIOA_CLK_ENABLE();
 __HAL_RCC_GPIOB_CLK_ENABLE();
 __HAL_RCC_GPIOG_CLK_ENABLE();
 
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
 
/* USER CODE BEGIN 4 */
void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth)
{
 
	flag = 1;
}
/* USER CODE END 4 */
 
/* MPU Configuration */
 
void MPU_Config(void)
{
 MPU_Region_InitTypeDef MPU_InitStruct = {0};
 
 /* Disables the MPU */
 HAL_MPU_Disable();
 
 /** Initializes and configures the Region and the memory to be protected
 */
 MPU_InitStruct.Enable = MPU_REGION_ENABLE;
 MPU_InitStruct.Number = MPU_REGION_NUMBER0;
 MPU_InitStruct.BaseAddress = 0x0;
 MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;
 MPU_InitStruct.SubRegionDisable = 0x87;
 MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
 MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
 MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
 MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
 MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
 MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
 
 HAL_MPU_ConfigRegion(&MPU_InitStruct);
 /* Enables the MPU */
 HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
 
}
 
/**
 * @brief This function is executed in case of error occurrence.
 * @retval None
 */
void Error_Handler(void)
{
 /* USER CODE BEGIN Error_Handler_Debug */
 /* User can add his own implementation to report the HAL error return state */
 __disable_irq();
 while (1)
 {
 }
 /* USER CODE END Error_Handler_Debug */
}
 
#ifdef USE_FULL_ASSERT
/**
 * @brief Reports the name of the source file and the source line number
 * where the assert_param error has occurred.
 * @param file: pointer to the source file name
 * @param line: assert_param error line source number
 * @retval None
 */
void assert_failed(uint8_t *file, uint32_t line)
{
 /* USER CODE BEGIN 6 */
 /* User can add his own implementation to report the file name and line number,
 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
 /* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */

[Pavel A.]

Why is HAL_ETH_MspInit called in line 243 after Init in line 232?

Why is HAL_ETH_IRQHandler called in line 245?

Have you tried to deal with any interrupt before?

[root437]

I tried to do the order of function calls as in the documentation for the driver.

Removed HAL_UART_IRQHandler. I experimented

/*
The ETH HAL driver can be used as follows:
 
 (#)Declare a ETH_HandleTypeDef handle structure, for example:
 ETH_HandleTypeDef heth;
 
 (#)Fill parameters of Init structure in heth handle
 
 (#)Call HAL_ETH_Init() API to initialize the Ethernet peripheral (MAC, DMA, ...)
 
 (#)Initialize the ETH low level resources through the HAL_ETH_MspInit() API:
 (##) Enable the Ethernet interface clock using
 (+++) __HAL_RCC_ETH1MAC_CLK_ENABLE()
 (+++) __HAL_RCC_ETH1TX_CLK_ENABLE()
 (+++) __HAL_RCC_ETH1RX_CLK_ENABLE()
 
 (##) Initialize the related GPIO clocks
 (##) Configure Ethernet pinout
 (##) Configure Ethernet NVIC interrupt (in Interrupt mode)
 
 (#) Ethernet data reception is asynchronous, so call the following API
 to start the listening mode:
 (##) HAL_ETH_Start():
 This API starts the MAC and DMA transmission and reception process,
 without enabling end of transfer interrupts, in this mode user
 has to poll for data reception by calling HAL_ETH_ReadData()
 (##) HAL_ETH_Start_IT():
 This API starts the MAC and DMA transmission and reception process,
 end of transfer interrupts are enabled in this mode,
 HAL_ETH_RxCpltCallback() will be executed when an Ethernet packet is received
 
 (#) When data is received user can call the following API to get received data:
 (##) HAL_ETH_ReadData(): Read a received packet
*/

[Pavel A.]

> Removed HAL_UART_IRQHandler.

But is there an ETH interrupt handler in your code and does it call HAL_UART_IRQHandler ?

And where do you call send?

[MHens.2]

Side note: Are you sure about the MAC address? all 00-00-00 after the OUI seems unlikely.

[root437]

This is the default configuration.

Ethernet transfer with this MAC is successful

[Pavel A.]

> DMACSR signals 0x00004080 (receive buffer unavailable) 

Where the buffers and descriptors are set up?

Please take an existing working example first and learn how it works.

[root437]

I use H743. I didn't configure DMA myself. As I understand it, the Ethernet MAC has its own DMA and it is configured in the functions: HAL_ETH_Init, HAL_ETH_Start_IT

Should I have taken any additional steps?

Where can I see a suitable example? (with up-to-date drivers and without LWIP)

[Pavel A.]

> As I understand it, the Ethernet MAC has its own DMA

Correct.

>Should I have taken any additional steps?

Your code does not show (or I don't see it?) assignment of DMA descriptors and memory buffers.

Unfortunately ST does not provide examples without LwIP or AzureRTOS.

Such examples IIRC were available before the "rework" (version 1.9.*)