Ethernet MAC and its DMA controller is not getting reset in STM32H733xx MCU

[MSatish]

I am using STM32H733ZGT6 in my project. For Ethernet communication, KSZ8081RNB PHY is configured in 25MHz mode such that PHY has to supply the 50MHz clock to MAC in my MCU. Problem here is, when I try to reset the MAC and its DMA controller by setting the  0th bit in ETH_DMAMR register, Reset operation is not completing (0th bit is still set by Hardware). I found that PHY's reference clock (50Hz) is not obtained, Is this the only reason? I am not sure what other conditions I am missing to complete the Reset. Please help me to resolve this.

[Piranha]

> I found that PHY's reference clock (50Hz) is not obtained, Is this the only reason?

Yes. But, of course, the ETH peripheral clocks must be enabled in RCC, respective GPIO pins must be configured and MII/RMII mode selected before that.

[MSatish]

Hi, Piranha, thanks for your reply.

Yes, Ethernet peripheral clock and RMII pin configurations are also done. Root cause I found that, in new HW design, PHY Reset Signal pin is connected to separate MCU GPIO whereas in the earlier HW design PHY reset signal was connected to Controller nRST signal. So I need to wake the PHY from Reset manually. Now PHY is able to generate 50MHz clock and MAC initializations are success.