FreeRTOS contest switching time from ISR

[RCont.2]

Hi all,

In my project I need to read an ADC at a sample rate of 15KSPS. When new data becomes ready to read, the ADC pull low the DRDY line. I've configured this line as input interrupt and in the ISR a signal is sent to a task waiting for it before to do some calculation.

It works well, but the call to osSignalSet take about 15usec to be executed that is too much for my goal. Is there a way to speed it up? The MCU clock is 168 MHz.

Thanks in advance for any help.

[KnarfB]

You might want to wrtite the ADC samples into a circular DMA buffer and signal the task only from the HalfFull and Full interrupts. This significantly reduces the signalling frequency and allows your task to handle ADC samples in larger chunks. There is, of course, a trade-off between signalling frequency and latency which you have to consider.