H5 1.2.0 and Cube 1.5 break ethernet

[robmilne]

After updating Cube to v1.5 for my STM32H5 project (Nucleo-H563ZI), the ethernet stopped working except during the initial run after a load of the firmware with the debugger.  After a reset, either POR or via the debugger, pings to the board fail.  When I checkout an earlier version of the code that uses a Cube v1.4 .ioc file, and bypass the migration to v1.5, the ethernet behaves normally.  Has anyone else experienced a similar issue?

[STea]

Hello @robmilne ,

I confirm the issue, I reported the issue internally.

Internal ticket number: 179408. (This is an internal tracking number and is not accessible or usable by customers).

Thank you.

[robmilne]

Hi STea,

Another issue, that is not a show stopper, is that POR/BOR reset will not allow the LAN8742 to function properly.  At the top of my main routine, I inspect the state of the RCC_RSR register and immediately issue a sw reset if it equals the default 0x0c000000 value.  Pin or software resets permit the ethernet transceiver to run properly.  I had the same issue on one of our prototype boards that uses an ethernet connector with integrated magnetics.

-rob

[STea]

Hello @robmilne ,

can you please share with me the project that caused the Ethernet to Fail with IDE1.15.
regarding the problem with POR/BOR thank you for pointing this out. but I don't seem to see this kind of behavior on Nucleo boards.

BR 

[FabioFly]

Hello @robmilne!

Please look at https://community.st.com/t5/stm32-mcus-embedded-software/netxduo-not-working-with-a-static-ip-addresss/td-p/673975. Seems to be similar to what you're facing.

 

Please let me know if that solution works for you.

 

BR,

FabioFly

[robmilne]

Hi FabioFly,

If you use Vin as rgw power source (JP2 to to 'VIN 5V'), it does not work on POR/BOR.  It works with a reset source of RCC_RSR_PINRSTF or RCC_RSR_SFTRSTF (I haven't checked WDG resets).

I can get it to work if I monitor the reset source at the start of main.  The following is what I need to do to get it working.

/* USER CODE BEGIN PTD */
 typedef enum reset_e {
 RCC_RESET_POR_BOR = 0, /*!< POR or BOR reset occurred (default) */
 RCC_RESET_PIN, /*!< Reset from pin occurred */
 RCC_RESET_SOFTWARE, /*!< system reset generated by the CPU */
 RCC_RESET_WWDG, /*!< window watchdog reset occurred from WWDG */
 RCC_RESET_IWDG, /*!< independent watchdog reset occurred */
 RCC_ILLEGAL_STOP_ENTRY, /*!< Illegal low-power mode reset occurred */
 RCC_RESET_UNKNOWN
 } reset_t;
/* USER CODE END PTD */

/* USER CODE BEGIN 0 */
reset_t getReset(void)
{
 /* HAL_RCC_GetResetSource() resets interrupt flags in RCC_RSR register */
 uint32_t reset_src=HAL_RCC_GetResetSource();

 if ((RCC_RSR_PINRSTF) == reset_src) {
 return RCC_RESET_PIN;
 }
 if ((RCC_RSR_PINRSTF | RCC_RSR_BORRSTF) == reset_src) {
 return RCC_RESET_POR_BOR;
 }
 if ((RCC_RSR_PINRSTF | RCC_RSR_SFTRSTF) == reset_src) {
 return RCC_RESET_SOFTWARE;
 }
 if ((RCC_RSR_PINRSTF | RCC_RSR_WWDGRSTF) == reset_src) {
 return RCC_RESET_WWDG;
 }
 if ((RCC_RSR_PINRSTF | RCC_RSR_IWDGRSTF) == reset_src) {
 return RCC_RESET_IWDG;
 }
 if ((RCC_RSR_PINRSTF | RCC_RSR_LPWRRSTF) == reset_src) {
 return RCC_ILLEGAL_STOP_ENTRY;
 }
 return RCC_RESET_UNKNOWN;
}
/* USER CODE END 0 */

int main(void)
{
 /* USER CODE BEGIN 1 */
 reset_t reset = getReset();

 if (RCC_RESET_POR_BOR == reset)
 {
		volatile int i;

		for (i = 0; i < 0x400000; i++) {};
		HAL_NVIC_SystemReset();
 }
 ...

 /* USER CODE END 1 */

-rob