HAL_GetUID functions do not seem to work

[keebler411]

The HAL_GetUID functions return the same value on different chips of the same series. I am using an STM32L0 series chip. This is my code:

uint32_t serialw0 = HAL_GetUIDw0();
uint32_t serialw1 = HAL_GetUIDw1();
uint32_t serialw2 = HAL_GetUIDw2();

Which returns these sames values on every chip:

205994032, 926167089, 17

Searching through the generated files this is code for the above functions:

#define UID_BASE (0x1FF80050UL) /*!< Unique device ID register base address */
 
uint32_t HAL_GetUIDw0(void)
{
 return(READ_REG(*((uint32_t *)UID_BASE)));
}
 
uint32_t HAL_GetUIDw1(void)
{
 return(READ_REG(*((uint32_t *)(UID_BASE + 4U))));
}
 
uint32_t HAL_GetUIDw2(void)
{
 return(READ_REG(*((uint32_t *)(UID_BASE + 8U))));
}
 

Now if write my own macro:

#define STM32_UUID ((uint32_t *)(0x1FF80050))
uint32_t serialw0 = *(STM32_UUID);
uint32_t serialw1 = *(STM32_UUID+4U);
uint32_t serialw2 = *(STM32_UUID+8U);

I get unique values for each chip but I don't think this is correct either:

205994032, 3432448017, 0

In fact its only word1 that seems to be unique which I suppose could be correct.

[Marcelo Barros]

I had a problem related to HAL_GetUIDw2() when using STM32L0x1/STM32L0x2. Checkingvthe user manual, the third ID word is not located at UID_BASE+8. Instead, it is at position UID_BASE+20. So, HAL_GetUIDw2() seems to point to the wrong position. The first two words are related to lot number and waffer number and only int the third word we have a factory programmed unique ID for this lot.

I suggest you check you user manual at section "Unique device ID registers".

[Imen.D]

Hello,

You are right. After check, we confirm that 0x14 is the correct offset for HAL_GetUIDw2 (as mentioned in the STM32L0 Reference Manual).

I raised this issue internally to developer team for fix and correct stm32L0xx_hal.c file (line 414)

// return(READ_REG(*((uint32_t *)(UID_BASE + 8U))));

So, this line should be:

return(READ_REG(*((uint32_t *)(UID_BASE + 20U))));

Thank you for highlighting this issue.

Kind Regards,

Imen

[keebler411]

Thanks for the confirmation. I'm just learning this platform and problems like this don't help, but I understand mistakes happen. Not like I haven't done similar either ;)

[RufusVS]

Do other chip series have a similar offset problem?  I am using STM32U family.

In my framework code, it uses BASE+0, BASE+4, BASE+8