I have a USB problem with "nucleo_l476rg" in version RTOS V3.3.0 where my overlay works fine with RTOS V2.7.4 Overlay has been Migrated to the new way used in V3.3.0.

[Tt.1]

I have a USB problem with "nucleo_l476rg" in version RTOS V3.3.0 where my overlay works fine with RTOS V2.7.4

Overlay has been Migrated to the new way used in V3.3.0.

Error Message:

 Booting Zephyr OS build zephyr-v3.3.0 

[00:00:00.000,000] <err> usb_dc_stm32: USB Clock is not 48MHz (4000000)

[00:00:00.000,000] <err> cdc_acm_composite: Failed to enable USB

I manage to get "nucleo_l496zg" running, when I found the enable for "clk_hsi48"

The "nucleo_l476rg" don't support "" and do not have a dedicated clock for USB 

Not sure how to setup the STM internal clock to in the zephyr way? 

It looks like there is missing some of the settings that showed in STM32CubeIDE.

Created a project with a usb serial just to get the autogenerated setting for zephyr.

Is there a "bug" in V3.3.0 when the STM don't support the clk_hsi48?

When "nucleo_l476rg" works it shows wait for connection:

 Booting Zephyr OS build v2.7.4  

[00:00:00.053,000] <inf> cdc_acm_composite: Wait for DTR

Test script:

west build -p always -b nucleo_l476rg samples/subsys/usb/cdc_acm_composite -- -DDTC_OVERLAY_FILE=~/DTS_STM32L476_V2_7.overlay

west flash

[Tt.1]

As a note I think it is needed to address this config and not sure it possible from devicetreee.

[Tt.1]

I got it solved at the end with help from a coworker

Those switches is not easy to set right with device tree ..

If any one also can use it

Adding this changes
 
&clk_lsi {
 status = "okay";
};
 
&clk_lse {
 status = "okay";
};
 
&clk_hsi {
 status = "okay";
};
 
&pll {
 div-m = <1>;
 mul-n = <10>;
 div-r = <2>;
 clocks = <&clk_hsi>;
 status = "okay";
};
 
&rcc {
 clocks = <&pll>;
 clock-frequency = <DT_FREQ_M(80)>;
 ahb-prescaler = <1>;
 apb1-prescaler = <1>;
 apb2-prescaler = <1>;
};
 
 
&clk_msi {
 status = "okay";
 msi-pll-mode;
 msi-range = <11>; /* to get 48MHz */
};