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BNord.1
Visitor II
September 23, 2020
Solved

Is it really required that VDD33USB is lower than VDD during power up/down?

  • September 23, 2020
  • 2 replies
  • 1792 views

Hello ST Community,

I'm planning to use the USB communication with a STM32H743ZI. Then, I will have to use an external power supply, since it doesn't have VDD50USB input. Furtherore, I will power this MCU with a 3.3Vcc. power supply.

However, I read in the AN4938 (Getting started with STM32H74xI/G and STM32H75xI/G hardware development) the following statement:

"During the power-on and power-down phases (VDD < VDD minimum value),VDD33USB should always be lower than VDD".

If I connect directly the VDD33USB to the VDD, I won't be compliant with this recommendation. What would be the consequences during the power on/off? Is there a risk that the USB communication fails?

In any case, would there be a power management IC that would you suggest to use if I wanted to be compliant with this recommendation?

Thanks a lot for your help.

    This topic has been closed for replies.
    Best answer by TDK

    I think that's only if it's connected to something other than the main power supply at 3.3V. It would be odd otherwise.

    0693W000004Gs5wQAC.png

    0693W000004Gs82QAC.png

    2 replies

    T
    TDKAnswer
    Super User
    September 23, 2020

    I think that's only if it's connected to something other than the main power supply at 3.3V. It would be odd otherwise.

    0693W000004Gs5wQAC.png

    0693W000004Gs82QAC.png

    B
    BNord.1Author
    Visitor II
    September 23, 2020

    Totally agree! I haven't understood it that way: I thought it meant "when the internal regulator supply was not availabe"...

    Thanks for enlightening me :)

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