Question
LTDC & SDRAM Devicetree Build error
This is another issue found in my endeavors to learn Zephyr. When building I get the following error:
warning: orphan section `.stm32_sdram2' from `zephyr/drivers/display/libdrivers__display.a(display_stm32_ltdc.c.obj)' being placed in section `.stm32_sdram2'
section `.stm32_sdram2' will not fit in region `IDT_LIST'
section .stm32_sdram2 VMA wraps around address space
region `IDT_LIST' overflowed by 228513 bytes
collect2.exe: error: ld returned 1 exit status
Here's my DTS setup:
&fmc {
pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1
&fmc_sdclk_pg8 &fmc_sdnwe_ph5 &fmc_sdcke1_ph7
&fmc_sdne1_ph6 &fmc_sdnras_pf11 &fmc_sdncas_pg15
&fmc_a0_pf0 &fmc_a1_pf1 &fmc_a2_pf2 &fmc_a3_pf3 &fmc_a4_pf4
&fmc_a5_pf5 &fmc_a6_pf12 &fmc_a7_pf13 &fmc_a8_pf14
&fmc_a9_pf15 &fmc_a10_pg0 &fmc_a11_pg1
&fmc_a12_pg2 &fmc_d0_pd14 &fmc_d1_pd15
&fmc_d2_pd0 &fmc_d3_pd1 &fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9
&fmc_d7_pe10 &fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13
&fmc_d11_pe14 &fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9
&fmc_d15_pd10>;
pinctrl-names = "default";
status = "okay";
sdram {
status = "okay";
power-up-delay = <100>;
num-auto-refresh = <8>;
mode-register = <0x220>;
refresh-rate = <0x2F9>;
bank@1 {
reg = <1>;
st,sdram-control = <STM32_FMC_SDRAM_NC_9
STM32_FMC_SDRAM_NR_13
STM32_FMC_SDRAM_MWID_16
STM32_FMC_SDRAM_NB_4
STM32_FMC_SDRAM_CAS_2
STM32_FMC_SDRAM_SDCLK_PERIOD_2
STM32_FMC_SDRAM_RBURST_ENABLE
STM32_FMC_SDRAM_RPIPE_2>;
st,sdram-timing = <2 7 5 7 3 2 2>;
};
};
};
<dc {
status = "okay";
pinctrl-0 = <<dc_r0_pi15 <dc_r1_pj0 <dc_r2_pj1 <dc_r3_pj2
<dc_r4_pj3 <dc_r5_pj4 <dc_r6_pj5 <dc_r7_pj6
<dc_g0_pj7 <dc_g1_pj8 <dc_g2_pj9 <dc_g3_pj10
<dc_g4_pj11 <dc_g5_pk0 <dc_g6_pk1 <dc_g7_pk2
<dc_b0_pj12 <dc_b1_pj13 <dc_b2_pj14 <dc_b3_pj15
<dc_b4_pk3 <dc_b5_pk4 <dc_b6_pk5 <dc_b7_pk6
<dc_de_pk7 <dc_clk_pi14 <dc_hsync_pi12 <dc_vsync_pi13>;
pinctrl-names = "default";
disp-on-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>;
bl-ctrl-gpios = <&gpioc 6 GPIO_ACTIVE_HIGH>;
/*
lcd-intr-gpios = <&gpiog 2 GPIO_ACTIVE_HIGH>;
lcd-rst-gpios = <&gpiob 12 GPIO_ACTIVE_HIGH>;
*/
/*eternal SDRAM in which frame buffer will be stored.If not defined, internal RAM will be used. */
/*refer st,stm32-ltdc.yml*/
ext-sdram = <&sdram2>;
/*PANEL_PIXEL_FORMAT_RGB_888*/
/*pixel-format = <1>;*/
width = <480>;
height = <272>;
display-timings {
compatible = "zephyr,panel-timing";
de-active = <0>;
pixelclk-active = <0>;
hsync-active = <0>;
vsync-active = <0>;
hsync-len = <1>;
vsync-len = <1>;
hback-porch = <88>;
vback-porch = <32>;
hfront-porch = <40>;
vfront-porch = <13>;
};
pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>;
def-back-color-red = <0xFF>;
def-back-color-green = <0xFF>;
def-back-color-blue = <0xFF>;
};
sdram2: sdram@d0000000 {
compatible = "zephyr,memory-region", "mmio-sram";
device_type = "memory";
reg = <0xd0000000 DT_SIZE_M(32)>; /* 256Mbit */
zephyr,memory-region = "SDRAM2";
zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
};
&sdram2 {
status = "okay";
};
Any advice/pointer is appreciated. Thanks!