Secure TAMPER on STM32H5

[rpm95]

Hi,

I am working on a secure TAMPER application running on STM32H5731I-DK. Tamper module init and config is properly executed for active tamper detection with interruption. The TAMP_MISR register is set as expected once the tamper attempt is discovered, however the TAMP_SMISR is never set. Given that the TAMP_SMISR is used by the TAMP IRQ handler to determine the IRQ origin, the event is never handled correctly.

The application is running in a secure context.

Is there any reason/explanation why TAMP_SMISR would not be set ?

Is there any specific register meant to be set ?

Thanks

[Chris21]

A presentation on Tamper for the L5 said,

"The interrupt service routine can easily determine which tamper event has occurred by reading the TAMP_MISR or TAMP_SMISR register which contains flags identifying the source of the tamper event interrupt. MISR is relevant when the interrupt is non-secure, SMISR when it is secure.
The TAMPDPROT bit in the TAMP_SMCR register determines whether the TAMP module asserts the non-secure or the secure interrupt request to the NVIC."