[STM32F303][USB FS] Isochronous endpoint: 1 ms frame with a large buffer.

[marcobascetta9]

[STM32F303][USB FS] Isochronous endpoint: 1 ms frame with a large buffer.

Hello,

I would like to know how I could setup an isochronous endpoint with a large payload.

USB specification and RM0316 manual:

• USB 2.0 specification report that in FS mode, it is allowed to send a payload of 1023 bytes.
• The RM0316 manual, at page 1083, describes the USB_COUNTn_TX as follows:
  • These bits are not used since packet size is limited by USB specifications to 1023 bytes.
• The RM0316 manual, at page 1084 (USB_COUNTn_RX - BL_SIZE) states as follows:
  • With this block size the allocated buffer size theoretically ranges from 32 to 1024 bytes, which is the longest packet size allowed by USB standard specifications.

These encouraging words are followed by this enigmatic phrase:

  However, the applicable size is limited by the available buffer memory.

Does "available buffer memory" refers to the USB SRAM?

So, is it correct that I could never setup a payload buffer greather than ~256B?

Let me try to briefly explain myself with the following SRAM allocation schema (ischronous endp uses double buffer feature): 

+-------------------------------------------------+
| SRAM (512B) |
+--------+---------+--------+----------+----------+
| BTABLE | ep0 out | ep0 in | ep1 isoc | ep1 isoc |
+--------+---------+--------+----------+----------+
| 16B | 64B | 64B | yB | yB |
+--------+---------+--------+----------+----------+

For this example assume that BTABLE contains configurations for ep0 and ep1 only (16 Bytes)

y = (512-16-64-64)/2 = 184 bytes.

Also, by shrinking ep0 to 8 bytes, we have:

y = (512-16-8-8)/2 = 240 bytes.

In this simple (and optimistic) case, how could I setup an ISOC endp that could send more than 240 bytes inside a 1ms frame (bInterval = 1) ?

Thank you for the support.

[waclawek.jan]

Why the /2?

Btw. which 'F303? The 'F303D/E have 1024B USB buffer.

JW

[marcobascetta9]

The /2 is needed because ISOC use double buffer feature that permits to switch from ADDRn_Tx and ADDRn_Rx of a single ep foreach frame.

Is it correct?

However also without double buffer the upper limit is 480B.

With 303xE I could use all 1024B (without CAN bus), so upper limit (using previuous example) will be 440B.

y = (1024-16-64-64)/2 = 440 bytes.

There is no way to use a larger buffer? Is it a known limitation?

Thanks.

[waclawek.jan]

> The /2 is needed because ISOC use double buffer

Ah, I see, yes, that makes sense.

> There is no way to use a larger buffer?

Not in 'F303.

> It is a known limitation?

How do you mean? It's a parameter of USB module in this particular STM32 model, in the same way as the number of endpoints; it's given in the DS/RM.

You'd need to use a different STM32 model. I don't know if there are models which have the device-only module with more than 1kB USB RAM but I don't think so. Even in the 'F4 with two USB OTG modules, one of them (FS) has only 1.25kB of buffer, only the HS has 4kB.

JW

[marcobascetta9]

DS describe USB as USB2.0 compliant. In RM the phrase "However, the applicable size is limited by the available buffer memory" is the only that reports a limitation.

In my opinion is not pretty clear this restriction.

Thanks for your support. I'll select ST family/size for my application in a better way.