STM32F407 SPI Datasize and FSMC #WR operation DOUBLEs

[jhl14]

Hi Team,

​

Basing on the lastest "STM32F4xx_StdPeriph_Driver" to Read SPI data and then write into external FSMC(8bit) device in the PWM interrupt like following .

​

//----------------------------------------------------------------------------------------------------

void TIM2_IRQHandler(void)

{

SPI1->DR = 0; // SPI_InitStructure.SPI_DataSize = SPI_DataSize_16b;

FTadd = Word_Upload++; // #define FTadd (*( uint16_t *)0x64000002)

TIM_ClearITPendingBit(TIM2,TIM_IT_Update);

}

//----------------------------------------------------------------------------------------------------

​

But from the LA waveform below, both SPI clock and FSMC #WR ops doubled.FSMC init as following

//--------------------------------------------------------------------------------------------------------------

port.FSMC_AddressSetupTime = 0X05;

 port.FSMC_AddressHoldTime = 0X05;

 port.FSMC_DataSetupTime =0X0c;

 port.FSMC_BusTurnAroundDuration = 0X0a;

 port.FSMC_CLKDivision = 0X00;

 port.FSMC_DataLatency = 0X19;

 port.FSMC_AccessMode = FSMC_AccessMode_A;  

​

FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;

FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;

FSMC_NORSRAMInitStructure.FSMC_MemoryType =FSMC_MemoryType_SRAM;//;  FSMC_MemoryType_NOR

FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b;

FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;

FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;

FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;

FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;

FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;

FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;

FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;

FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;

FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;

FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &port;

FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &port;

FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);

​

FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE); 

//-----------------------------------------------------------------------------------------------------------------------------

​

So can you give me some direction to debug? thank you!

​

BRs，

JHL​

[waclawek.jan]

This is probably the interrupt being executed twice, due to late flag clear.

JW

[jhl14]

Thank you, JW. You SHORT words exactly shot it. When doing the following change, the problem is gone.

//----------------------------------------------------------------------------------------------------

void TIM2_IRQHandler(void)

{

TIM_ClearITPendingBit(TIM2,TIM_IT_Update);

SPI1->DR = 0; // SPI_InitStructure.SPI_DataSize = SPI_DataSize_16b;

FTadd = Word_Upload++; // #define FTadd (*( uint16_t *)0x64000002)

}

//----------------------------------------------------------------------------------------------------

Got the following form.thanks again and like this community!!! :D

BRs

JHL