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Visitor II
November 25, 2025
Solved

STM32F427 CLASSB V4.0.0 Keil project: flash test failed with starting address at 0x08008000

  • November 25, 2025
  • 2 replies
  • 254 views

I have a project which can pass the flash test while starting address is at 0x08000000. After changing the starting address to 0x08008000, the flash test failed.

I have made the following changes:

1. main.c 

// #define TEST_ROM_START_ADDR 0x08000000U
#define TEST_ROM_START_ADDR 0x08008000U

2. system_stm32f4xx.c

#define USER_VECT_TAB_ADDRESS

#if defined(USER_VECT_TAB_ADDRESS)
/*!< Uncomment the following line if you need to relocate your vector Table
 in Sram else user remap will be done in Flash. */
/* #define VECT_TAB_SRAM */
#if defined(VECT_TAB_SRAM)
#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
 This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
 This value must be a multiple of 0x200. */
#else
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
 This value must be a multiple of 0x200. */
//#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
// This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET 0x00008000U																										 
#endif /* VECT_TAB_SRAM */
#endif /* USER_VECT_TAB_ADDRESS */

 

3. Project.sct

;LR_IROM1 0x08000000 0x00080000 { ; load region size_region
LR_IROM1 0x08008000 0x00070000 { ; load region size_region
; ER_IROM1 0x08000000 0x00080000 { ; load address = execution address
 ER_IROM1 0x08008000 0x00070000 { ; load address = execution address
 *.o (RESET, +First)
 *(InRoot$$Sections)
 .ANY (+RO)
 .ANY (+XO)
 }

 

4.post-build.bat

STM32_Programmer_CLI.exe -sl "Out/Project.axf" 0x08008000 0x08078000 0x400
C:\Keil_v5\ARM\Arm_Compiler_5.06u7\bin\fromelf.exe --bincombined --bincombined_padding=4,0xFFFFFFFF .\Out\Project.axf --output .\Out\Project.bin

 

5. In Options for Target's "Target" tab:

IROM1: Start 0x08008000, size 0x70000

 

The CRC are inserted successfully, but the Full Test at start is failed at flash test. Do I miss any setting or modifications?

Thank you. 

 

 

    This topic has been closed for replies.
    Best answer by melfice

    Hi,

    Reading the UM3461 page 10 Figure 4, I find that all examples's ROM_START and ROM_END are same. And the library V4.0.0 can work before I modify the ROM_START to be application start address and ROM_END to be application end address in the post build command. So, I guess the STM32_Programmer_CLI.exe CRC insert command can not be modified and the CRC region must located as shown in Figure 4. I rollback the batch command to be same as the library V4.0.0 and keep other modifications. Now, the CRC test can be passed.

     

    STM32_Programmer_CLI.exe -sl "Out/Project.axf" 0x08000000 0x08080000 0x400
    C:\Keil_v5\ARM\Arm_Compiler_5.06u7\bin\fromelf.exe --bincombined --bincombined_padding=4,0xFFFFFFFF .\Out\Project.axf --output .\Out\Project.bin

    As the CRC region will be fixed from CRC_START (0x0807F800) to ROM_END (0x08080000), if my application need to put some data in this range, will it cause CRC test failed? This is needed to be verified. 

    Thank you for your assistances.

    2 replies

    ST Employee
    November 25, 2025

    hello @melfice

    It is essential that in your startup code or in system_stm32f4xx.c you include the following call:

    SCB->VTOR = VECT_TAB_BASE_ADDRESS + VECT_TAB_OFFSET;

    This sets the Vector Table Offset Register (VTOR) to point to the new vector table address.

    melficeAuthor
    Visitor II
    November 26, 2025

    Hello Hamdi,

    Yes, in system_stm32f4xx.c, the function, SystemInit(), has the call. 

    void SystemInit(void)
    {
     /* FPU settings ------------------------------------------------------------*/
     #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
     SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
     #endif
     /* Reset the RCC clock configuration to the default reset state ------------*/
     /* Set HSION bit */
     RCC->CR |= (uint32_t)0x00000001;
    
     /* Reset CFGR register */
     RCC->CFGR = 0x00000000;
    
     /* Reset HSEON, CSSON and PLLON bits */
     RCC->CR &= (uint32_t)0xFEF6FFFF;
    
     /* Reset PLLCFGR register */
     RCC->PLLCFGR = 0x24003010;
    
     /* Reset HSEBYP bit */
     RCC->CR &= (uint32_t)0xFFFBFFFF;
    
     /* Disable all interrupts */
     RCC->CIR = 0x00000000;
    
    #if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
    // #if defined (DATA_IN_ExtSRAM)
     SystemInit_ExtMemCtl(); 
    #endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
    
     /* Configure the Vector Table location -------------------------------------*/
    #if defined(USER_VECT_TAB_ADDRESS)
     SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
    #endif /* USER_VECT_TAB_ADDRESS */
    }

     

    Thank you.

    ST Employee
    November 25, 2025

    Hello,

     

    I know there is an issue of the STM32CubeProgrammer under investigation if the the code start is set not divisible by 4KB but it should not be your case.

    I suggest to read the compiled file by STM32CubeProgrammer and verify if the binary starts on 0x08008000, checksum area starts from address 0x08077900 and number of words stored from this address corresponds to number of occupied 1KB blocks. If last  address occupied by your binary e.g. is 0x080756BF (note it must be word aligned!), you should see field of 438 precalculated words stored from the address 0x08077900 there. The last word at this field corresponds to the CRC checksums of the last incomplete section starting from address  0x08075400 at this example. Starting address of your flash module subset (user parameter dedicated for the flash test module configuration) should be set to 0x08008000 and end one must corresponds just to the last address occupied by the binary (here 0x080756BF). If your subset setting is correct and you are pretty sure that the binary code is continuous (there should be no gaps between the code sections linked at binary). I suggest to set atomic step of the module execution to 1 and call the test run procedure at a loop section by section and try to calculate by a loop counter which section of the test fails while focusing content of the failed section then.

    Best regards,

    Petr 

    melficeAuthor
    Visitor II
    November 26, 2025

    Hello Petr,

    Running debug on the code, I set breakpoint at the flash failed handler,  FailSafe_Handler(TMF_ERR_CODE): FlashSubsetFullTest.StartAddr=0x08008000

    FlashSubsetFullTest.EndAddr=0x0801A9E3

    Check with STM32CubeProgrammer, the CRC region start at 0x08077900 and end at 0x08077A2B. The end address is different from the calculated result, 0x08077A29. 

    Do you have any suggestions?

    Thank you.

    melficeAuthorAnswer
    Visitor II
    November 27, 2025

    Hi,

    Reading the UM3461 page 10 Figure 4, I find that all examples's ROM_START and ROM_END are same. And the library V4.0.0 can work before I modify the ROM_START to be application start address and ROM_END to be application end address in the post build command. So, I guess the STM32_Programmer_CLI.exe CRC insert command can not be modified and the CRC region must located as shown in Figure 4. I rollback the batch command to be same as the library V4.0.0 and keep other modifications. Now, the CRC test can be passed.

     

    STM32_Programmer_CLI.exe -sl "Out/Project.axf" 0x08000000 0x08080000 0x400
    C:\Keil_v5\ARM\Arm_Compiler_5.06u7\bin\fromelf.exe --bincombined --bincombined_padding=4,0xFFFFFFFF .\Out\Project.axf --output .\Out\Project.bin

    As the CRC region will be fixed from CRC_START (0x0807F800) to ROM_END (0x08080000), if my application need to put some data in this range, will it cause CRC test failed? This is needed to be verified. 

    Thank you for your assistances.