STM32F7: new (2022-07) ethernet HAL - anybody tested it?

[LCE]

Heyho,

has someone already tested the new HAL ethernet driver for F7 ?

I have my F767 prototype up and running, raw lwIP with http server and PTP are working flawlessly.

After having done lots of other driver and user interface via http / REST stuff, I finally have to get data streaming via ethernet (TX) running.

The "old" HAL driver gave me a shock yesterday when I looked at it again after a few month:

• buffers are copied
• polling (really bad with TTSS on the TX side (getting PTP timestamp from hardware back into pbuf for PTP calculations) - which is mostly my fault because I added that)

So I hope that the new ethernet driver is taking better care of these problems, or at least gives me a better source to copy/edit from.

I really need the transmit rate close to 100M (I know that's not possible, but let the hardware get at least close to it, so that later on 50M will be no problem).

... and off to check the new files...

[LCE]

I tried to get the latest ethernet HAL (1.17) to run with my code.

No success at all with the interrupt functions, super slow result with the non-interrupt version.

I'll probably go back to the old version and try to rewrite stuff, using some ideas from the new HAL (TX interrupts, descriptors, "zero-copy").

[Piranha]

This question is answered in the following topic:

https://community.st.com/s/question/0D53W00001VYkb5SAD/stm32f417-lwip-udp-packets-are-being-truncated

[WAiel.1]

Thanks for the link. You helped me as well.

[LCE]

Thanks!

I already wrote new transmit functions, based on the old HAL drivers, using TX interrupt and the zero-copy buffer stuff based on the new driver.

Almost no more HAL stuff in my code, except for some configuration functions.

In the next months I can test which TX bit rate will be achieved - I need reliable 50 Mbit/s...

[Piranha]

> I really need the transmit rate close to 100M (I know that's not possible...

Not only it is possible, but I have demonstrated it on exactly the MCU you are using:

https://community.st.com/s/question/0D50X0000AhNBoWSQW/actually-working-stm32-ethernet-and-lwip-demonstration-firmware

Just in case... Take a note on PTP implementation in the reworked ETH driver:

https://community.st.com/s/question/0D50X00009XkYXsSAN/stm32f427-ptp-implementation

[LCE]

100M - that was not well formulated, I meant that exactly 100M will not be possible.

I saw your threads and your work on the ethernet stuff, that really helped a lot.

AND most important gave me the info that high data rates are possible with the F7.

PTP:

I had this running before looking at the new ethernet drivers, and I was really curious what the "new PTP support" meant... well, not much. Actually nothing, as you say in the mentioned thread, it's mostly putting some functions around 1 or 2 register actions.

When I changed my source to zero-copy TX, re-writing my existing PTP stuff (mostly based on the PTPd out there) was the most time-consuming task, because it was blocking while waiting for the TX timestamp set bit.