STM32F723 USB HS FIFO arrangement

[Mehran Memarnejad]

Hi,

Sometimes (randomly) I encounter a problem in firmware, even though sometimes it works well for hours without any problem.

The whole idea of the firmware is that it receives data over USB HS with DMA enabled and initiate a transfer over another interface, e.g. I2C, in transmit function of EP called upon dataout stage callback of ST USB Core middleware.

Everything works well, but sometimes I guess a problem is caused in USB. I have encountered with similar issue in another situation, which made EP0 to cause problem and stuck the USB. I fixed that issue by changing EP Max Packet Size and hence in USB FIFO, as I encounter a comment in HAL that in case of using USB DMA, some parts of FIFO are used as DMA registers.

In firmware, I have enabled all 8 IN and OUT EPs with the following MPS:

EP0 (ctrl)-> 64bytes
EP1 (int)-> 64bytes
EP2 (int)-> 64bytes
EP3 (int)-> 64bytes
EP4 (int)-> 128bytes
EP5 (int)-> 256bytes
EP6 (int)-> 256bytes
EP7 (int)-> 512bytes

 Note that all IN and OUT EPs are enabled and send/receive data.

And allocating FIFO as below (sizes are in word):

HAL_PCDEx_SetRxFiFo(hpcd, 512);
HAL_PCDEx_SetTxFiFo(hpcd, 0, 16);
HAL_PCDEx_SetTxFiFo(hpcd, 1, 16);
HAL_PCDEx_SetTxFiFo(hpcd, 2, 16);
HAL_PCDEx_SetTxFiFo(hpcd, 3, 16);
HAL_PCDEx_SetTxFiFo(hpcd, 4, 32);
HAL_PCDEx_SetTxFiFo(hpcd, 5, 64);
HAL_PCDEx_SetTxFiFo(hpcd, 6, 64);
HAL_PCDEx_SetTxFiFo(hpcd, 7, 128);

 Question: is the FIFO arrangement correct in case of using USB HS with DMA enabled?

I feel but not sure that there might be a problem in USB HAL or Hardware

[Walid ZRELLI]

Hello @Mehran Memarnejad​ ,

Your issue has been raised internally. I will keep you informed.

BeST Regards,

Walid

[Mehran Memarnejad]

Hi,

The firmware worked for about 12 hours sending and receiving data on all 7 endpoints as well as 1 Ctrl endpoint without any problem, But all of sudden it got stuck

*** IN EPs are working well and I can see that the interrupt of receiving requests from driver on Host PC is generated in MCU

*** OUT EPs does not work so Host can't send them data

In summary, IN EPs are working but OUT EPs has problem

Question: What could be the problem as the firmware was working well for more than 12 hours? I guess and feel but NOT sure that there might be a problem in USB Hardware.

[Walid ZRELLI]

Hello @Mehran Memarnejad​ ,

Your FIFO setting is correct in DMA mode. This may be an USB hardware problem.

BeST Regards,

Walid

[Mehran Memarnejad]

Hi,

what do you mean by hardware problem? do you mean there might be a problem in STM32F723 USB Controller?

Have you ever seen a similar problem?

What about any workaround?

[waclawek.jan]

The Rx FIFO must be able to hold not only the largest single packet, but also a status word to it, also space for SETUP packets for EP0 (which device must not NAK), and some more.

Read FIFO RAM allocation subchapter in OTG chapter of RM.

JW

[Mehran Memarnejad]

Hi,

I have allocated 2KB for Rx FIFO while my MPS is 512 which is for EP7

I guess, that must be sufficient