Skip to main content
Visitor II
May 10, 2023
Solved

STM32G0 USB-PD Policy Engine Requests Hard Reset after power negotiation

  • May 10, 2023
  • 4 replies
  • 4122 views

I'm bringing up a PD source and it will successfully negotiate an explicit contract, but if the source is unplugged and plugged back in, it will still negotiate correctly, but the PE will request a hard reset causing one to be sent 256 ms after PS_RDY message. Timing is consistently 255-256ms (the PE task returns a delay of 255 then resets). The source continues in a cycle of hard resets until power is cycled to the board or it is reprogrammed. I have confirmed that this originates from the PE and not the DPM or the sink. I cannot provide a trace using ST's utility as we are moving to an in house implementation of the DPM.

The PE task is suspended and USBPD_PE_StateMachine_Stop is called on disconnect.

These USBPD_ParamsTypeDef structure members are reset on disconnect to these values:

.PE_SpecRevision = Settings().PE_SpecRevision;

.PE_PowerRole = Settings().PE_DefaultRole;

.PE_SwapOngoing = USBPD_FALSE;

.ActiveCCIs = CCNONE;

.VconnCCIs = CCNONE;

.VconnStatus = USBPD_FALSE;

USBPD_PE_StateMachine_Reset is called on connect before resuming the PE task.

Running USBPDCORE_PD3_FULL_CM0PLUS_wc32.a

#define LIB_STACK_VER    (0x410U << LIB_STACK_VER_POS)

USBPDCORE_LIB_PD3_FULL defined

single port

STM32G071GB

PE_Get_RxEvent returns 20 (0x14) in the state machine call that calls hard reset

    This topic has been closed for replies.
    Best answer by Guenael Cadier

    Issue has been solved by applying a more recent version of ST USBPD Core stack MW component.
    => v4.3.1 that is available here.

    4 replies

    ST Employee
    June 12, 2023

    Hi @USBPD Dan​ 

    Similar question is tracked internally and is under analysis.

    Internal ticket number: 151909 (This is an internal tracking number and is not accessible or usable by customers).

    Will let you know the outcome.

    Regards

    Visitor II
    June 19, 2023

    Hello,

    I am also getting a Hard Reset that is set in the UCPD SR (status register) (Rx Hard Reset detect interrupt), every single time during power negotation after the Source sends accept, and Sink sends a Good CRC. Hard Reset is seen, and stops the power negotation. See attached screenshot of the USB-PD negotiation from Total Phase. I am using an STM32G474RETx, with RTOS2 (RTX5). I have this working with the example using FreeRTOS, but I want to utilize RTOS2 with RTX5. Is the STM32 USBPD API compatible with RTOS2 RTX5?

    Thanks,

    Eric

    ST Employee
    June 28, 2023

    Issue has been solved by applying a more recent version of ST USBPD Core stack MW component.
    => v4.3.1 that is available here.

    Visitor II
    July 13, 2023

    Thanks for the reply Guenael. I was able to resolve my issue by adding the USBPD_DPM_TimerCounter(); function into my TIM global interrupt handler.