STM32H735G-DK HyperRAM Configuration Register Read failed

[JKim.2]

Hello,

I created the STM32H735G-DK project with the board selector in STM32CubeIDE.

The OSPI_HyperRAM_MemoryMapped project was created by the example selector. Its HyperRAM configuration register read codes were added to the STM32H735G-DK project as below. Writing data and reading data from the HyperRAM array work fine. However, both CR0 read and CR1 read returned INVALID_SEQUENCE error as below. Please help me to solve this problem.

Thanks.

 

S70KL1281_CR0_ADDRESS = 0x00001000
HAL_OSPI_HyperbusCmd: ErrorCode HAL_OSPI_ERROR_INVALID_SEQUENCE
Error from HAL_OSPI_HyperbusCmd

Read CR0 ERROR

S70KL1281_CR1_ADDRESS = 0x00001002
HAL_OSPI_HyperbusCmd: ErrorCode HAL_OSPI_ERROR_INVALID_SEQUENCE
Error from HAL_OSPI_HyperbusCmd

Read CR1 ERROR

 

 if (S70KL1281_ReadCfgReg0(&hospi2, &reg) != S70KL1281_OK) {
	 printf("\n\r");
	 printf("Read CR0 ERROR\n\r");
	 printf("\n\r");
 } else {
	 printf("Read CR0 = %08lx\n\r", reg);
 }
 if (S70KL1281_ReadCfgReg1(&hospi2, &reg) != S70KL1281_OK) {
	 printf("\n\r");
	 printf("Read CR1 ERROR\n\r");
	 printf("\n\r");
 } else {
	 printf("Read CR1 = %08lx\n\r", reg);
 }

 

 

 

int32_t S70KL1281_ReadCfgReg0(OSPI_HandleTypeDef *Ctx, uint16_t *Value)
{
 OSPI_HyperbusCmdTypeDef sCommand;

 /* Initialize the read command */
 sCommand.AddressSpace = HAL_OSPI_REGISTER_ADDRESS_SPACE;
 sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS;
 sCommand.Address = S70KL1281_CR0_ADDRESS;
 sCommand.DQSMode = HAL_OSPI_DQS_ENABLE;
 sCommand.NbData = 2U;								//number of bytes

 printf("\n\rS70KL1281_CR0_ADDRESS = 0x%08lx\n\r", S70KL1281_CR0_ADDRESS);
 /* Configure the command */
 if (HAL_OSPI_HyperbusCmd(Ctx, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
 {
	printf("Error from HAL_OSPI_HyperbusCmd\n\r");
 return S70KL1281_ERROR;
 }

 /* Reception of the data */
 if (HAL_OSPI_Receive(Ctx, (uint8_t *)Value, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
 {
	 printf("Error from HAL_OSPI_Receive\n\r");
 return S70KL1281_ERROR;
 }

 return S70KL1281_OK;
}

 

 

 

HAL_StatusTypeDef HAL_OSPI_HyperbusCmd(OSPI_HandleTypeDef *hospi, OSPI_HyperbusCmdTypeDef *cmd, uint32_t Timeout)
{
 HAL_StatusTypeDef status;
 uint32_t tickstart = HAL_GetTick();

 /* Check the parameters of the hyperbus command structure */
 assert_param(IS_OSPI_ADDRESS_SPACE(cmd->AddressSpace));
 assert_param(IS_OSPI_ADDRESS_SIZE (cmd->AddressSize));
 assert_param(IS_OSPI_NUMBER_DATA (cmd->NbData));
 assert_param(IS_OSPI_DQS_MODE (cmd->DQSMode));

 /* Check the state of the driver */
 if ((hospi->State == HAL_OSPI_STATE_READY) && (hospi->Init.MemoryType == HAL_OSPI_MEMTYPE_HYPERBUS))
 {
 /* Wait till busy flag is reset */
 status = OSPI_WaitFlagStateUntilTimeout(hospi, HAL_OSPI_FLAG_BUSY, RESET, tickstart, Timeout);

 if (status == HAL_OK)
 {
 /* Re-initialize the value of the functional mode */
 MODIFY_REG(hospi->Instance->CR, OCTOSPI_CR_FMODE, 0U);

 /* Configure the address space in the DCR1 register */
 MODIFY_REG(hospi->Instance->DCR1, OCTOSPI_DCR1_MTYP_0, cmd->AddressSpace);

 /* Configure the CCR and WCCR registers with the address size and the following configuration :
 - DQS signal enabled (used as RWDS)
 - DTR mode enabled on address and data
 - address and data on 8 lines */
 WRITE_REG(hospi->Instance->CCR, (cmd->DQSMode | OCTOSPI_CCR_DDTR | OCTOSPI_CCR_DMODE_2 |
 cmd->AddressSize | OCTOSPI_CCR_ADDTR | OCTOSPI_CCR_ADMODE_2));
 WRITE_REG(hospi->Instance->WCCR, (cmd->DQSMode | OCTOSPI_WCCR_DDTR | OCTOSPI_WCCR_DMODE_2 |
 cmd->AddressSize | OCTOSPI_WCCR_ADDTR | OCTOSPI_WCCR_ADMODE_2));

 /* Configure the DLR register with the number of data */
 WRITE_REG(hospi->Instance->DLR, (cmd->NbData - 1U));

 /* Configure the AR register with the address value */
 WRITE_REG(hospi->Instance->AR, cmd->Address);

 /* Update the state */
 hospi->State = HAL_OSPI_STATE_CMD_CFG;
 }
 }
 else
 {
 status = HAL_ERROR;
 hospi->ErrorCode = HAL_OSPI_ERROR_INVALID_SEQUENCE;
 printf("HAL_OSPI_HyperbusCmd: ErrorCode HAL_OSPI_ERROR_INVALID_SEQUENCE\n\r");
 }

 /* Return function status */
 return status;
}

 

 

 

static void MX_OCTOSPI2_Init(void)
{

 /* USER CODE BEGIN OCTOSPI2_Init 0 */

 /* USER CODE END OCTOSPI2_Init 0 */

 OSPIM_CfgTypeDef sOspiManagerCfg = {0};
 OSPI_HyperbusCfgTypeDef sHyperBusCfg = {0};

 /* USER CODE BEGIN OCTOSPI2_Init 1 */

 /* USER CODE END OCTOSPI2_Init 1 */
 /* OCTOSPI2 parameter configuration*/
 hospi2.Instance = OCTOSPI2;
 hospi2.Init.FifoThreshold = 4;
 hospi2.Init.DualQuad = HAL_OSPI_DUALQUAD_DISABLE;
 hospi2.Init.MemoryType = HAL_OSPI_MEMTYPE_HYPERBUS;
 hospi2.Init.DeviceSize = 32;
 hospi2.Init.ChipSelectHighTime = 8;
 hospi2.Init.FreeRunningClock = HAL_OSPI_FREERUNCLK_DISABLE;
 hospi2.Init.ClockMode = HAL_OSPI_CLOCK_MODE_0;
 hospi2.Init.WrapSize = HAL_OSPI_WRAP_NOT_SUPPORTED;
 hospi2.Init.ClockPrescaler = 4;
 hospi2.Init.SampleShifting = HAL_OSPI_SAMPLE_SHIFTING_NONE;
 hospi2.Init.DelayHoldQuarterCycle = HAL_OSPI_DHQC_ENABLE;		//HAL_OSPI_DHQC_DISABLE;
 hospi2.Init.ChipSelectBoundary = 23;
 hospi2.Init.DelayBlockBypass = HAL_OSPI_DELAY_BLOCK_USED;
 hospi2.Init.MaxTran = 0;
 hospi2.Init.Refresh = 250;
 if (HAL_OSPI_Init(&hospi2) != HAL_OK)
 {
 Error_Handler();
 }
 sOspiManagerCfg.ClkPort = 2;
 sOspiManagerCfg.DQSPort = 2;
 sOspiManagerCfg.NCSPort = 2;
 sOspiManagerCfg.IOLowPort = HAL_OSPIM_IOPORT_2_LOW;
 sOspiManagerCfg.IOHighPort = HAL_OSPIM_IOPORT_2_HIGH;
 if (HAL_OSPIM_Config(&hospi2, &sOspiManagerCfg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
 {
 Error_Handler();
 }
 sHyperBusCfg.RWRecoveryTime = 4;		//3.0V 100MHz tRWR spec 40nS
 sHyperBusCfg.AccessTime = 6;
 sHyperBusCfg.WriteZeroLatency = HAL_OSPI_LATENCY_ON_WRITE;	//HAL_OSPI_NO_LATENCY_ON_WRITE;
 sHyperBusCfg.LatencyMode = HAL_OSPI_FIXED_LATENCY;
 if (HAL_OSPI_HyperbusCfg(&hospi2, &sHyperBusCfg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
 {
 Error_Handler();
 }
 /* USER CODE BEGIN OCTOSPI2_Init 2 */
 /* Memory-mapped mode configuration --------------------------------------- */
 sCommand.AddressSpace = HAL_OSPI_MEMORY_ADDRESS_SPACE;
 sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS;
 sCommand.DQSMode = HAL_OSPI_DQS_ENABLE;
 sCommand.Address = 0;
 sCommand.NbData = 1;

 if (HAL_OSPI_HyperbusCmd(&hospi2, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
 {
 Error_Handler();
 }

 sMemMappedCfg.TimeOutActivation = HAL_OSPI_TIMEOUT_COUNTER_DISABLE;

 if (HAL_OSPI_MemoryMapped(&hospi2, &sMemMappedCfg) != HAL_OK)
 {
 Error_Handler();
 }
 /* USER CODE END OCTOSPI2_Init 2 */

}