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Visitor II
December 22, 2019
Question

STM32H743xx Version V Bootloader init issue !!

  • December 22, 2019
  • 1 reply
  • 1178 views

Hi All,

I have a strange problem entering the Bootloader.

I need to send 0x7F twice to enter Bootloader.

Details:

I am working on a project where I need to program STM32H743xx MCU via UART pins. I was successful in programming STM32H743xx “Version Y�? via UART pins where I had to send 0x7F command once to enter the Bootloader.

Due to unavailability of the samples of ‘ Version Y ‘ , the supplier gave us ‘Version V’ samples and it’s strange that I need to send 0x7F command twice to enter the Bootloader.

Note: The PCB is custom made and the programming works fine for “Version Y�? and I am facing this problem for “Version V�?.

I would like to know if anybody is facing this problem and I would really appreciate if I can get any solution for this problem .

Thanks in advance.

    This topic has been closed for replies.

    1 reply

    Technical Moderator
    January 6, 2020

    Hello James,

    Referring to AN2606, we find the following note for STM32H74x/5x devices: "To be able to connect to the bootloader USART1 using PB14/PB15 pins, you need to send two synchronization bytes."

    Do you confirm that USART1 is used on your case?

    Your description seems to be in contradiction with the one provided by @JYUNWEI wu​  on https://community.st.com/s/question/0D50X0000Bud5VTSQY.

    Could you please precise: is one synchronization byte required for rev Y or rev V device?

    Thanks,

    Amel

    James1Author
    Visitor II
    January 6, 2020

    Hai Amel,

    Thank you very much for responding to my post.

    Unfortunately the USART1 pins happens to be PB14/PB15 in my case. I had a formal discussion with ST FAE and tested both Nucleo board's with Version V & Y series MCU.

    From the test's we concluded that only PB14/PB15 pins of Version V has this problem and rest other USART Bootloader pins of Version V & Y including PB14/PB15 pins of Version Y enters Bootloader successfully with one synchronization byte.

    Thanks,

    James

    Technical Moderator
    January 6, 2020

    What you see as behavior using rev V is aligned with the note mentioned in AN2606.

    I am checking internally: if it is not required to have 2 synchronization bytes with rev Y, this needs to be precised in AN2606.