STM32H745 DAMMUX1 not configurable if any one of the DMA block reset

[shivashankarr]

Hi,

I am using the STM32H745 and facing the following issue:

1. ADC with DMA1 works fine when the DMA2 block is not reset.
2. ADC with DMA1 fails when the DMA2 block is reset(in RCC->AHB1RSTR). The "DMAMUX request line multiplexer (DMAREQ_ID field in the DMAMUX_C0CR register)" resets back to 0.

It appears that the DMAMUX is closely tied to both DMA controllers (DMA1 and DMA2). None of the available documents (es0445-stm32h745-errata, rm0399 - Reference Manual, en.STM32H7-DMAMUX, en.STM32H7-DMA) provide the required information on this behavior.

Is this the expected behavior? Are there any documents from STM32 that can justify this? some help would be greatly appreciated. 

Thanks

 

[nouirakh]

Hello @shivashankarr 

In order to reproduce the possible issue, could you please provide more details on your setting project if possible, attach your .ioc file/configuration?

[shivashankarr]

Hello nouirakh,

Sorry, this is a non-IOC file setup, but I can provide detailed steps to reproduce the issue.

Case 1: Configure the ADC and DMA1 to interface with any sensor or memory, then reset DMA2 (in RCC->AHB1RSTR). Afterward, check the SFR register the DMAREQ_ID field in the DMAMUX_C0CR register will reset to 0.

Case 2: If you reset DMA2 (in RCC->AHB1RSTR) and then try to configure the ADC and DMA1, observe the SFR register (DMAREQ_ID field in the DMAMUX_C0CR register). It will not allow you to write the configuration.

BR

[Saket_Om]

Hello @shivashankarr 

 

I escalated this post internally and will be back to you with update.

Internal Ticket ID 189893 (It is an internal tracking number and is not accessible or usable by customers).

[Saket_Om]

Hello @shivashankarr 

After investigation, we confirm that this is the expected behavior. The reference manual will be updated to include this information for clarity.