STM32L4 DMA setup

[joelG]

I have a question about DMA in the STM32L432 (and presumably similar more most STM32L4* devices). The background is that I'm trying to set up timer #2 driving a DAC, and have the DAC grab new data from a circular buffer via DMA.

In the RM0394 reference manual (chapter 11: DMA controller), Table 41 details the request-to-channel multiplexor. For channel 3, CxS[3:0]=0110, it lists “TIM6_UP DAC_CH1.”

First, what does TIM6_UP mean? Is it meant to be a timer update event, as somehow distinct from the timer trigger-output TRGO? In any case, chapter 10 (Peripherals Interconnect Matrix) doesn’t even mention any interconnect from timers to DMA. 

Second, what does it mean to have two sources listed for the same mux setting? In my application, TIM2 is triggering the DAC, and the DAC requests a DMA transfer – so TIM2 never directly talks to the DMA controller. Does the notation “TIM6_UP DAC_CH1” mean that either source can trigger the DMA transfer, and the user is responsible for ensuring that only one of them actually does? I’ll note that in the STM32L4* HAL manual (UM1884), chapter 22 allows the DMA_InitTypeDef::Request field to take the value of DMA_REQUEST_DAC1_CH1 or DMA_REQUEST_TIM6_UP – which seems to imply that these are different values.

(By the way, the intended labels for this post were DMA and DAC, but the forum software does not seem to want me to use those, so I randomly picked STM32Cube MCU Packages instead).

Thanks,

Joel

[waclawek.jan]

> First, what does TIM6_UP mean? Is it meant to be a timer update event,

Yes; in this context, it's the DMA request (trigger) coming from TIM6's Update event, if enabled by setting TIM6_DIER.UDE.

> as somehow distinct from the timer trigger-output TRGO?

TRGO is output of the multiplexer controlled by TIMx_CR2.MMS. If TIMx_CR2.MMS is set to 0b010, TRGO is identical to Update, but otherwise it's not.

> Second, what does it mean to have two sources listed for the same mux setting?

ST's documentation is not great in those details. They are probably just ORed together, so...

> Does the notation “TIM6_UP DAC_CH1” mean that either source can trigger the DMA transfer, and the user is responsible for ensuring that only one of them actually does?

... yes.

 

> I’ll note that in the STM32L4* HAL manual (UM1884), chapter 22 allows the DMA_InitTypeDef::Request field to take the value of DMA_REQUEST_DAC1_CH1 or DMA_REQUEST_TIM6_UP – which seems to imply that these are different values.

I'm not interested in Cube/HAL, but a cursory glance at the respective header appears to indicate that those symbols are defined only for the 'L4 models (basically the top-end 'L4+) which do have DMAMUX. That's a very different mechanism from the low-end 'L4 covered by RM0394.

JW

[joelG]

Thanks, Jan. That all makes sense; I wrote the code based on it, and it works fine.

/Joel