STM32L4P5CG and bootloader programming appear to have L1 mem protection set now

[JCase.1]

I have an application running on an STM32L4P5. Initially, I programmed and debugged with J-Link on the micro 9-pin SWDIO connector. All worked great, I could use J-Mem to peer into sram or flash in real time. Then I built a bootloader over USB, using the protocols in the ST ap notes. Works great. Now I can program over USB cable. However, now I cannot use J-Mem to debug. I would guess that my erase from the bootloader erased the default L0 memory protection, setting L1. I can't make heads or tails out of the documentation to confirm this, nor to figure out how to set it back to L0 protection. Help? Thanks in advance!

Addendum: I just added an in-code probe to look at the FLASH_OPTR at 0x40022020 and saw the default, 0xFFEFF8AA, which implies level 0 protection, so now I am more confused. (saw same in the flash area at 0x1FF00000).

[Piranha]

> Now I can program over USB cable. However, now I cannot use J-Mem to debug.

Do you mean debugging over that USB connection? That is just not possible.

[JCase.1]

No. sorry for the misunderstanding. With the bootloader, I can reprogram the CPU over the USB cable. Then run the embedded code (which has some console I/O over the USB as a comport).

Before I ever programmed via bootloader, I could hook up J-Link and run J-mem to probe memory while running the embedded code. Now when I hook up J-Link and start J-mem, it wipes flash. The option bits, however are set to AA for level 0 protection. What am I missing?