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Visitor II
September 22, 2023
Question

STM32WB55 Outputting a 40Mhz clock out signal

  • September 22, 2023
  • 1 reply
  • 1897 views

I have an IC on a board I'm designing that needs a 40Mhz clock in signal. Due to a variety of design and regulatory requirements, I would like to avoid having an external oscillator and instead use the clock out signal of the STM32WB55 on the board. I have written firmware that can output a 32Mhz signal, but I'm struggling with outputting 40Mhz:

 

volatile unsigned int *RCC_AHB2ENR = (unsigned int *)0x5800004C;
volatile unsigned int *RCC_CFGR = (unsigned int *)0x58000008;
volatile unsigned int *GPIOA_MODER = (unsigned int *)0x48000000;
volatile unsigned int *GPIOA_AFRH = (unsigned int *)(0x48000000 + 0x24);

#define RCC_AHB2ENR_GPIOAEN (1 << 0)
#define RCC_CFGR_MCOSEL_Pos (24)
#define RCC_CFGR_MCOSEL_SYSCLK (0x1 << RCC_CFGR_MCOSEL_Pos)
#define RCC_CFGR_MCOPRE_Pos (28)
#define RCC_CFGR_MCOPRE_DIV2 (0x1 << RCC_CFGR_MCOPRE_Pos)

void configure_clock_out() {
// Enable the clock for GPIOA
*RCC_AHB2ENR |= RCC_AHB2ENR_GPIOAEN;

// Configure pin A8 as alternate function (AF0)
*GPIOA_MODER &= ~(0x3 << (16)); // Reset the bits for pin A8
*GPIOA_MODER |= (0x2 << (16)); // Set the bits for pin A8 to alternate function mode
*GPIOA_AFRH &= ~0xF; // Reset the alternate function bits for pin A8

// Configure the MCO output to 32 MHz
*RCC_CFGR &= ~(RCC_CFGR_MCOSEL_SYSCLK); // Reset the MCO configuration bits
*RCC_CFGR |= (RCC_CFGR_MCOSEL_SYSCLK); // Set the MCO configuration to 32 MHz
}
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    1 reply

    Graduate II
    September 22, 2023

    Hello @kullum 

    I suggest you to debug step by step the code and track the variation of clock values in every step. Else, I think you should share the full project here to give the opportunity to our community members and experts to find the issue.

    Best regards.

    II

    kullumAuthor
    Visitor II
    September 22, 2023

    Hi Issamos,

    This is the full code. This will do what I expect it to do, set A8 to 32Mhz. What I want it to do, that I don't know how to do, is set it to 40Mhz.

    Graduate II
    September 22, 2023

    Than you need to use HSI PLL clock and configure the PLL parameters(M,...) to have a 40MHz SYSCLK.

    Best regards.

    II