Subject: Issues with LWIP on Nucleo-F746ZG – Release Mode & MPU Configuration
Dear ST Community,
I am working on an Ethernet TCP/IP project using the Nucleo-F746ZG development board with the LWIP stack, without any RTOS. I have based my implementation on the tcp_echoclient example driver file. The project builds successfully, and the application runs in debug mode, but it does not work in release mode.
I have compared the map files for both release and debug modes but found no significant differences.
Additionally, I am facing issues with MPU configuration while using the LWIP stack. Specifically, I need clarification on:
- The correct SRAM1 and SRAM2 addresses for the LWIP RAM heap pointer
- The appropriate addresses for Rx and Tx DMA descriptors in the linker script
- Whether all these addresses need to be explicitly configured in both the MPU settings and the linker script file
Project Details:
- Development Board: Nucleo-F746ZG
- Ethernet Stack: LWIP
- RTOS Middleware: No
- TCP Client: tcp_echoclient
- Issues: Application runs in debug mode but not in release mode, MPU and linker script configuration
I would appreciate any guidance on these issues. Thank you in advance!
