Skip to main content
Explorer
May 7, 2024
Solved

TIM1 output compare mode on STM32G070

  • May 7, 2024
  • 1 reply
  • 1496 views

Hi All,

 

I am trying to generate variable frequency using TIM1 on STM32G070.

I use TIM1 in output compare mode and PC8 as an output for channel 1. Pre-scaler is set to 0 and ARR to divider for whatever frequency I want. When checking registers I see CNT changing between 0 and ARR, as expected but nothing happens at the output. I tried to change PC8 directly to rule out electrical problem - it works fine.

I need just to toggle the PC8, nothing else, but nothing happens... I went through many examples, but very few are relevant for stm32g0 using only CMSIS. Running out of ideas what could be wrong and looking at it for too long, so there is likely something I cannot see.

If anyone has an idea where to look, that would be great

Thanks

 

// Enable clock for GPIOC

RCC->IOPENR |= RCC_IOPENR_GPIOCEN;

// Enable clock for TIM1

RCC->APBENR2 |= RCC_APBENR2_TIM1EN;

 

// Disable TIM1

TIM1->CR1 &= ~TIM_CR1_CEN;

// Configure TIM1 for Output Compare, toggle pin

TIM1->SMCR &= ~(TIM_SMCR_SMS | TIM_SMCR_ECE); // internal clock

TIM1->CNT = 0; // Reset counter

TIM1->PSC = 0; // TIM1 pre-scaler = 0;

TIM1->ARR = Get_TIM1_Reload_Val(AF_BW_DEFAULT); // Auto reload value - for default 2700Hz BW (value is 0xEC)

TIM1->CR1 &= ~TIM_CR1_DIR; // Counter direction - UP

TIM1->CR1 &= ~TIM_CR1_CKD_Msk; // Clock division 0

TIM1->CR1 &= ~TIM_CR1_CMS; // Edge aligned mode

TIM1->CR1 &= ~TIM_CR1_OPM; // One pulse mode disabled

TIM1->CR1 &= ~TIM_CR1_ARPE; // ARR preload disabled

 

// Set output compare mode for Channel 1

TIM1->CCER &= ~TIM_CCER_CC1E; // Disable channel 1

TIM1->CCR1 = 0; // Compare register

TIM1->CCMR1 &= ~TIM_CCMR1_CC1S; // CC1 channel is output

TIM1->CCMR1 &= ~TIM_CCMR1_OC1M_Msk; // Set Channel 1 to output compare toggle mode

TIM1->CCMR1 |= TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_1;

TIM1->CCER |= TIM_CCER_CC1E; // Enable OC channel 1 output

 

// Configure PC8 as AF2 for TIM1 CH1

GPIOC->MODER &= ~GPIO_MODER_MODE8_Msk;

GPIOC->MODER |= GPIO_MODER_MODE8_1; //pin PC8, alternate function - 10

GPIOC->AFR[1] &= ~GPIO_AFRH_AFSEL8_Msk; //pin PC8, AF2

GPIOC->AFR[1] |= GPIO_AFRH_AFSEL8_1;

GPIOC->OSPEEDR &= ~GPIO_OSPEEDR_OSPEED8; //pin8 increase speed

GPIOC->OSPEEDR |= GPIO_OSPEEDR_OSPEED8_0;

 

// Enable TIM1

TIM1->CR1 |= TIM_CR1_CEN;

    This topic has been closed for replies.
    Best answer by Sarra.S

    Hello @vladov

    For advanced-control timers like TIM1, you need to enable the main output : 

    TIM1->BDTR |= TIM_BDTR_MOE;

    1 reply

    Sarra.SAnswer
    ST Employee
    May 8, 2024

    Hello @vladov

    For advanced-control timers like TIM1, you need to enable the main output : 

    TIM1->BDTR |= TIM_BDTR_MOE;
    vladovAuthor
    Explorer
    May 8, 2024

    Thanks for advice, that's a new information for me. It works fine now.