TIMx_RCR function description from STM32F103 to STM32L475 change in manual

[Harish1]

Hi,

I found that TIMx_RCR functionality reversed w.r.t timer counter started from F103 to L475 as per the article. Here, I just want to know whether this bug is in the manual or is it reversed when comparing F103 to L475.

Please find below two screenshots from both manuals.

F103:

 

L475:

[Tesla DeLorean]

I suspect the latter is more probable as the CNT is down-counting is the second half of the center-aligned mode, isn't it?

When in doubt, create some test cases and determine the exact behaviour to your own satisfaction.

[Harish1]

I have tested in L475 and found that working like the description mentioned in the F103.

[waclawek.jan]

IMO this section is garbage in both versions. As RCR is unconditionally preloaded, writing it does nothing, and what happens after starting counter depends on current state of CNT and DIR.

I guess this sort of text is written by inexperienced staff using some "libraries", probably SPL in the first case and Cube in second, which could explain the difference.

Much of the narrative in TIM chapter is ridden by this crappy aproach.

JW

[Harish1]

I agree. ST need to revise both the manuals with the correct solution.

[Vincent Onde]

Hello,

I confirm that the correct description in the L475 one:

In Center aligned mode, for odd values of RCR, the update event occurs either on the overflow or on the underflow depending on when the RCR register was written and when the counter was launched: if the RCR was written before launching the counter, the UEV occurs on the underflow. If the RCR was written after launching the counter, the UEV occurs on the overflow.

The F103 RM needs to be corrected. We're sorry for this.

@Community member​ 

I confirm writing the RCR before or after starting the counter does modify the UEV position.

Best regards,

Vincent

[Harish1]

No, I have tested in L475 but it is not working like that.

I have written the odd value to RCR after launching the counter the UEV is occurring on underflow interrupt(when the counter starts up count).

[waclawek.jan]

Hi Vincent,

Thanks for the clarification.

> I confirm writing the RCR before or after starting the counter does modify the UEV position.

So, let's have TIM1 after reset, enable its clock in RCC, write ARR with some sane value, write CR1.CMS to nonzero, then write an odd value to RCR (ie. it's before enabling counter) and then write one into CR1.CEN to start counter. There was no reason to have UEV until this point, correct? So, you assert, that as RCR was written *before* starting counter (but it was not effectively transferred into the repetition counter as there was no UEV so far), the first UEV happens after timer counts up, then down and underflows, correct?

Jan

@Vincent Onde​ 

[waclawek.jan]

Here a simple program to try (for 'L476 Disco):

[salesforce accepted the code into the editor pane, but was so kind to throw an inexplicable "Maximum number of topic assignments have been exceeded." error upon attempting to post. Will try to append somehow below. #ditch_salesforce]

As expected, the order between writing RCR and setting CR1.CEN does not matter.

What matters is order between RCR write and the next Update.

JW

[waclawek.jan]

The code

[waclawek.jan]

I didn't make it up:

 

JW

[waclawek.jan]

> I have written the odd value to RCR after launching the counter

​

Post code.

​

JW​

​

​

[Vincent Onde]

Hi @Community member​,

Sorry for this very late answer.... I agree with you, the statement in the user manual only applies if there is an update of the register. And it's for sure missing in the description, we'll have to change this, also adding some pseudo code to make it clearer.

Just to be sure we're on the same page, here are the software sequences.

When the RCR is written prior to start the counter, we have the update on underflow:

 TIM1->RCR = 1;

 TIM1->EGR = TIM_EGR_UG;

 TIM1->CR1 |= TIM_CR1_CEN;

When the RCR is written after starting the counter, we have the update on overflow:

 TIM1->EGR = TIM_EGR_UG;

 TIM1->CR1 |= TIM_CR1_CEN;

 TIM1->RCR = 1;

I hope this helps,

With my best regards (and thanks for your contributions to the community),

Vincent

[waclawek.jan]

Hi Vincent,

Thanks for chiming in.

I fail to see difference between the two snippets you've posted.

(Also, why do you RMW to EGR?)

Jan

@Vincent Onde​