USB soft reset on STM32H745

[LHoug.1]

I am trying to get the device working but I cant seem to get the basic working.

Code :

USB->GRSTCTL |= USB_OTG_GRSTCTL_CSRST;

 do

 {

   if (++count > 200000U)

   {

     return TIMEOUT;

   }

 }

 while ((USB->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST);

Always times out. What could cause this?

[waclawek.jan]

Missing clock for the given module.

Additionally, if this is the module with ULPI interface and you don't intend to use ULPI, make sure that ULPI is disabled in RCC.

JW

[LHoug.1]

My RRC is setup as follows (I don't intend to used ULPI)

RCC->AHB1ENR =   //RCC_AHB1ENR_USB1OTGHSULPIEN | // Disable USB_PHY1 clock.

                   RCC_AHB1ENR_USB1OTGHSEN |     // Enable USB1OTG (OTG_HS1) clock.

                0;

RCC->D2CCIP2R = (0b01 << RCC_D2CCIP2R_USBSEL_Pos) |     // USBOTG1/2 = pll1_q_clk.

0;

I have calculated pll1_q_clk as 62.5Mhz and I am already using it with my CAN interface.

What else do I need to do to enable the clock for the interface?

[waclawek.jan]

I don't use H7, but whatever code you write, the chip ultimately behaves according to what is really in its registers.

So read out the relevant RCC registers content and check.

You may also want to output the given clock/PLL output to some MCO pin if available, and check.

> I have calculated pll1_q_clk as 62.5Mhz

As I've said I don't use H7, but in other STM32 the USB clock tends to be 48MHz, exactly.

JW

[LHoug.1]

I was able to source a Nucleo -H732Z1 and changed my project to use the HSI48 clock for the USB. And the reset works now. But that seems to have been a "red herring" Because running "the same" (Nucleo uses USB2FS and I use USB1HS) code on both setups my boards does not respond the same.

It does not detect OTGINT->OTG_GOTGINT->SEDET (session end)

Nor does it generate UsbReset/ENUMDNE events after the DCTL.SDIS bit is cleared

What else could be the problem?