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September 12, 2024
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Using HAL NAND

  • September 12, 2024
  • 2 replies
  • 1252 views

Good afternoon.

I am configuring a NAND memory using FMC on the STM32H7. I am dealing with the following scenario: HCLK = 80 MHz (to match the example in AN4761) and a NAND memory SkyHigh Memory S34ML01G1 Following all the calculations specified in AN4761, I am encountering an error where the last byte fails on some pages. When a read is performed more than once, the byte is corrected, but there is this inconsistency. Where could the error be?

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    Best answer by KDJEM.1

    Hello @neemiasims,

     

    Which STM32H7 are you using?

    Please try to configure the NAND memory area as Strongly-Ordered using MPU, for that I recommend you to take a look at STM32 MPU tips - 1 MPU usage in STM32 with ARM Cortex M7.

     

    Thank you.

    Kaouthar

     

    2 replies

    KDJEM.1Answer
    Technical Moderator
    September 13, 2024

    Hello @neemiasims,

     

    Which STM32H7 are you using?

    Please try to configure the NAND memory area as Strongly-Ordered using MPU, for that I recommend you to take a look at STM32 MPU tips - 1 MPU usage in STM32 with ARM Cortex M7.

     

    Thank you.

    Kaouthar

     

    Explorer
    September 13, 2024

    I am using the STM32H723ZGTx. I am not working with MPU; it was disabled in the 'CORTEX_M7'. I will look into using it to see if it solves the problem. One detail: If I add a 1ms delay after each read and write, the last byte works perfectly, but this makes the memory operation very slow.