What is the register behavior of "rw_wt"?

[Carter Lee]

I'm trying to understand the register behavior of rw_wt.

In the RM0090, Ethernet DMA transmit poll demand register (ETH_DMATPDR) has a register. this register declared as "rw_wt". But I don't know how rw_wt work.

Could you please clarify the register behavior of "rw_wt"?

[waclawek.jan]

These registers are "write anything to trigger some process, reads are irrelevant but probably always 0".

I agree that it would be nice to see them documented properly. @Imen DAHMEN​ , can please this be considered?

JW

[KDJEM.1]

Hello @Carter Lee​  and welcome to the Community :),

Thank you for reporting this issue.

I confirm that the rw_wt is not cited in the list of abbreviations in the RM0090.

I will check internally.

Kaouthar

[Piranha]

...and all the other related reference manuals, of course. You know, the other F1, F2, F4 and F7 reference manuals, in which ST hasn't fixed almost anything of the other much more significant errors, which were reported years ago. ;)

[KDJEM.1]

Hello @Piranha​ ,

I checked all RMs and I confirm that this issue exists in RM0386, RM0033, RM0008, RM0410 and RM0090.

I reported internally.

Internal ticket number: 151004 (This is an internal tracking number and is not accessible or usable by customers).

Kaouthar

Thank you.

Kaouthar

[Piranha]

While the "rw_wt" should be properly documented, the textual description of the register is pretty clear. The most efficient is to do this:

ETH->DMATPDR = (uint32_t)ETH; // Any value issues a descriptor list poll demand.

Also read my posts there:

https://community.st.com/s/question/0D53W00001fwzz7SAA/32f417-how-to-prevent-lowleveloutput-in-ethernetifc-overwriting-the-last-dma-buffer

Especially about the unnecessary Rx poll demand...