When is the IDLE line detection interrupt triggered for UART?
Hello,
I'm trying to use the async Zephyr UART stm32 api, but I've encountered an issue. I'm using STM32F412.
I'm trying to use the Zephyr UART stm32 async API(with DMA), with 3Mbps. I can see that the received data are correct so the baudrate/frame/DMA settings are ok. The issue is that I receive two packets (8 bytes each) at once. The packets are sent with delay(even more than 100ms) between them. I can see that the IDLE line detection is used to inform the UART driver about the end of receiving. Unfortunately, it looks like the IDLE interrupt comes too slow in my case. The interrupt is triggered only once with recieved 16 bytes instead of 2 times with 8 bytes.
I program DMA to recieve 528(max packet size), so TC/HT DMA interrupts are triggered.
I've been studying the RM(RM0402) a lot, but I'm not sure about one topic. Please correct me if I'm wrong. The IDLE line is detected when the IDLE character/IDLE frame is detected. But I'm not sure what the IDLE character is. The Reference Manual says:
"An Idle character is interpreted as an entire frame of “1�?s followed by the start bit of the next frame that contains data (The number of “1�? ‘s will include the number of stop bits)."
So my question is: is the start bit of the next frame required to detect the IDLE frame? Or the IDLE frame is detected after 10(start bit + 8 data bits + stop bit) "1"s, right after receiving a new frame and the start bit of the following frame is not needed to trigger the IDLE interrupt.
BR,
Dawid
