Hello,
To answer that question:
@inky wrote:
I don't follow why the RX and TX of both chips are joined together, instead of the UART configuration. Please explain
In the CAN protocol, every node on the bus should listen continuously to what happening on the bus.
- In the arbitration phase, the senders while they are sending at the same time, they are listening to the bus level and compare to what they are sending: each difference is reported from the sender side as a loss of arbitration and put itself silent.
- In the data phase: the winner of the arbitration will continue to send its frame while it is listening to what happening on the bus. Each difference between what it is sending and what to it is listening is reported as an error.
Even if there are only two nodes on the CAN bus, these mechanisms couldn't be established when a cross connection of CAN_Tx <-> CAN_Rx is adopted.
That's why RX and TX of each node are joined together in the above configuration to let the sender listen to what it is sending.
Hope it's clear now.