Insights on possible values for ADC input voltage swing using external VREF

[Chubs]

Hello Community,

We are designing a simply cost sensitive Temperature sensing solution using low-cost Linear Thermistors TMP61Q1 from TI, and wish to use the internal ADCs on STM32G474RCT3 MCUs, this is an LQFP64 package with a dedicated VREF Buffer Pin which can drive output loads at 2.048V, 2.5V, 2.9V with 6.5mA.

We wish to understand in detail, can we use this VREF BUFF pin and add an external voltage reference of say 1V & then reduce the ADC input voltage swing to 0-1V for the entire 12-bit dynamic range?

Or can we set the VREF Buffer to 2.048V & use the ADC with VREF Internal channel such that the ADC Voltage swing becomes 0 to 2.048V for entire 12-bit range?

Or can we simply supply VDDA 1V & keep the ADC maximum voltage swing between 0 to 1V for the entire 12-bit resolution?

 

Kindly guide us with this use case, as the sensor output has a limited voltage swing & using a non-inverting amplifier is not a feasible option cost-wise.

Both I & my team are fairly new to the Analog circuit design & are looking forward for a good starting point to understand the ADCs on STM32G474 from the community.

Regards

[TDK]

There are limits on the range of allowable voltages on VREF+ which can be found in the datasheet. If you are tying VDD to VDDA, generally it's going to be limited to 2V+.

If you handle VDDA separately, you can get down to 1.62V.

In either case, you can't get down to 1V for the entire 12 bit swing.

https://www.st.com/resource/en/datasheet/stm32g474cb.pdf

[TDK]

Also be aware that the internal temperature sensor will measure the junction temperature of the chip, not ambient temperature. Even under low power settings, there can be a significant delta between the two.

[Chubs]

We do not intend to use the internal temperature sensor, we are using 4 x external TMP61 thermistors for remote sensing, & these sensors when used with Voltage divider design have a very low voltage swing over entire temperature range.

Thanks for your inputs @TDK .

[Chubs]

Idea is to use reduce the input voltage swing of the ADC from 0-3.3V to a lower range to maximize the ADC dynamic range use.

Now can we simply set the VREF Buffer to 2.048V range & use this as a reference of ADC 1 while keeping the Vdda as 3.3V for other ADCs to have a complete input voltage swing of 0-3.3V?

This could provide us with:

ADC1: 0 to 2.048V
ADCx: 0 to 3.3V

Is this a valid line of thought?

[Nikita91]

On default VREF+ pin in an input. You can connect an external reference to this input, then the max level for the ADC input is the VREF+ voltage. EDIT: You can't use an external référence of 1V.

The VREFBUF is not a pin but a switch to connect the internal reference voltage to the VREF+ pin.

The VREFBUF is used to set the VREF+ pin as output. The max level for the ADC input is also the VFERF+ voltage.  In this mode the allowed VREFBUF voltage depends on the VDDA voltage.

In your case  you must use an external reference connected to the VREF+ pin and ignore VREFBUF.

[Chubs]

Hello @Nikita91 & @MasterT 

Can we keep the VREF+ for different ADCs different on the same STM32G474? We have a total of 5 ADCs on this MCU & wish to configure different input voltage swing on these ADCs for maximum flexibility.

Consider the following use case that we want to achieve:
VDDA: 3.3V
VREFBUFF: 2.048V
VREF+ Pin: 1V from external source
ADC1: 0 to 1V range
ADCx: 0  to 3.3V range

Kindly guide with references that describe how to use these pins to maximize the flexibility of interfacing different Analog signals to the ADCs.

[MasterT]

No needs to lower Vref, your IC has:

"6 x operational amplifiers that can be used in
PGA mode, all terminals accessible"

There are also app. note from ST - AN5306 explains how to use OPA

[Nikita91]

You can't use VREFBUF and external référence at the same time.

There is only one reference for all ADC channels.

Temperature acquisition is slow. One can imagine switching external references to VREF+. But you say you are reluctant to add external components.

As @MasterT  points out you can use one of the MCU's internal OPAs and a PGA to amplify the only problematic channel: ADC1.

[Chubs]

Hello @Nikita91 & @MasterT,

Thank you for your suggestions & insights, it helps me gain better clarity about the ADC use cases.

Kindly guide me based on the following use case:

I'm considering setting the internal reference voltage buffer (VREFBUF) to 2.048V and the ADC supply voltage (VDDA) to 3.3V. My goal is to configure each ADC to use either VREFINT (which would be set by VREFBUF of 2.048V) or VDDA (which is 3.3v) as the reference voltage independently.

From my understanding of your guidance, the Reference Manual (RM0440), each ADC can independently select its reference voltage by programming the VREFEN bit in the ADCx_CCR register. If VREFEN is set to 1, the ADC uses VREFINT as its reference voltage (thus 2.048V), and if VREFEN is set to 0, the ADC uses VDDA (thus 3.3V). This implies that each ADC can have a different full-scale voltage range, depending on the value of VREFEN.

So in theory, I could configure some ADCs to have a 0 to 2.048V range (by setting VREFEN to 1 for those ADCs) and other ADCs to have a 0 to 3.3V range (by setting VREFEN to 0 for those ADCs). Is this understanding correct?

Is this the correct approach?

(The issue with the OPAMPs is we do not have those pins available anymore, I only have ADC1 & ADC2 pins accessible)

[MasterT]

There are pins:

/*
 Table 1. OPAMPs inverting/non-inverting inputs for the STM32G4 devices:
 +--------------------------------------------------------------------------------------------+
 | | | OPAMP1 | OPAMP2 | OPAMP3 | OPAMP4 | OPAMP5 | OPAMP6 |
 |-----------------|--------|----------|----------|----------|----------|----------|----------|
 | | No conn| X | X | X | X | X | X |
 | Inverting Input | VM0 | PA3 | PA5 | PB2 | PB10 | PB15 | PA1 |
 | (1) | VM1 | PC5 | PC5 | PB10 | PD8 | PA3 | PB1 |
 |-----------------|--------|----------|----------|----------|----------|----------|----------|
 | | VP0 | PA1 | PA7 | PB0 | PB13 | *PB14 | PB12 |
 | Non Inverting | VP1 | PA3 | PB14 | PB13 | PD11 | PD12 | PD9 |
 | Input | VP2 | PA7 | PB0 | PA1 | PB11 | PC3 | PB13 |
 | | VP3 | DAC3_CH1 | PD14 | DAC3_CH2 | DAC4_CH1 | DAC4_CH2 | DAC3_CH1 |
 +--------------------------------------------------------------------------------------------+
 (1): No connection in follower mode.

 Table 2. OPAMPs outputs for the STM32G4 devices:
 +--------------------------------------------------------------------------------+
 | | | OPAMP1 | OPAMP2 | OPAMP3 | OPAMP4 | OPAMP5 | OPAMP6 |
 |-----------------|--------|--------|--------|--------|--------|--------|--------|
 | Output | | PA2 | PA6 | PB1 | PB12 | PA8 | PB11 |
 |-----------------|--------|--------|--------|--------|--------|--------|--------+
 | Internal output | | ADC1 | ADC2 | ADC2 | ADC5 | ADC5 | ADC4 |
 | to ADCs | | CH13 | CH16 | CH18 | CH5 | CH3 | CH17 |
 | | | | | ADC3 | | | |
 | | | | | CH13 | | | |
 |-----------------|--------|--------|--------|--------|--------|--------|--------+

about 19 pins just non-inverting inputs. Only non-inverting pin required for external connection with sensor, output of the OPA may have link to ADC w/o pin use, same with inverting input - PGA matrix may not have any external pins.

It's hard to believe that no free pins left, "there is a will there's a way".

PGA provides x64 time amplification, compare to x1.5 with Vref manipulation, difference is enormous x42 (!)

[MasterT]

I wouldn't change Vref, from my experince with nucleo-G474re board (has a jumper to select Vdd or LM431 as external reference, and option to select Internal Vref if jumper is OFF).

Noise is quite high when internal ref selected, seems output impedance of the internal circuitry is high value and that require cureful managment of the: sampling clock duration/ sampling rate / monitor spacing if many ADC in use so they do not sample simulteneoulsy. In short it doesn't worse a trouble to get x1.5 better resolutioon. 

Another option as termosensor always slow:

1.use hardware oversampling to get 16-bits, and more bits if software averaging after that. 

2. use differential mode to lower noise

[waclawek.jan]

> require careful management of the: sampling clock duration/ sampling rate / monitor spacing if many ADC in use so they do not sample simultaneously

Generally, ADC in 'G4 appears to be picky, in comparison to e.g. 'F3 (which 'G4 is supposed to replace), see ADC-related errata and the 'G4-ADC-specific AN5346.

JW

[RhSilicon]

About sensor curve, TMP61-Q1, it reminded me of sensor curve KTY84. In the KTY84 datasheet it says that it is "Virtually Linear" note that there is a deviation, the curve is not completely linear (which would be a straight line, not a parabola) some compensation may be needed depending on the range and accuracy desired. On a device that uses the KTY84 I had to deviate the extremes via trimpot calibration, so that the center of the curve was closer to the average.

I am including the TMP117 sensor (+/-0.1°C) in another project that was operating with the DS18B20. This TMP117, despite being expensive compared to a thermistor, seems to be worth it, since it is a digital sensor, I2C bus (it could be even better if it were 1-wire like the DS18B20).