STM32 dual core booting sequences

[Dino_ST77]

Hello ST Community,

I read in the follow post question about boot sequences for STM32:

STM32H7 dual core: How to start with a busy-waitin... - STMicroelectronics Community

So, in the post above, I see that is explain the first three Boot order of the Table 8 of the RM0399 (I put this table below), but not the last modality: Both Cortex®-M7 and Cortex®-M4 are booting.

My question is: is possible to have a explanation similar to the one in the post above, but refer to Both Cortex®-M7 and Cortex®-M4 are booting?

Thanks in advance,

Dino

[mƎALLEm]

Hello @Dino_ST77 ,

The article you mentioned refers to the final case where both cores are booting together (BCM7 = 1, BCM4 = 1) but synchronized with a hardware semaphore. While others refer to something else: using BCMx bits in the option bytes and RCC_BOOT_Cx bits in RCC_GCR register:

From the reference manual RM0399: 

You can also refer to the template examples provided in the CubeHAL:

https://github.com/STMicroelectronics/STM32CubeH7/tree/master/Projects/NUCLEO-H745ZI-Q/Templates

 

They use this API to make a core to boot. In this example the API is called from CM4 side to make CM7 to boot:

 /* Enable CPU1 (CM7) boot regardless of option byte values */
 HAL_RCCEx_EnableBootCore(RCC_BOOT_C1);

Hope that helps.