STM32 MPUs

I am using the STM32MP257F-DK with a WiFi-BT module. WiFi is connected via SDIO pins and Bluetooth is connected using UART6 pins through the 40-pin header.I am testing the HFP profile on the BT module. When I run the dial-number script from the ofono test script, the call is placed successfully, but there is no audio during the call.PipeWire, WirePlumber, and oFono are all running successfully, but when dialing a number, I get the following log: root@stm32mp2-e3-d2-9e:/usr/lib/ofono/test# ./dial-number xxxxxxxxxxofonod[1675]: src/modem.c:get_modem_property() modem 0xd3664a0 property SystemPathUsing modem /hfp/org/bluez/hci1/dev_5C_ED_F4_5A_72_AEofonod[1675]: src/voicecall.c:synthesize_outgoing_call() Registering new call: 1/hfp/org/bluez/hci1/dev_5C_ED_F4_5A_72_AE/voicecall01ofonod[1675]: src/voicecall.c:ofono_voicecall_notify() Got a voicecall event, status: dialing (2), id: 1, number: 9651273221 called_number: , called_nameofonod[1675]: src/voicecall.c:ofono_voicecall_notify() F

Hello,I notice that on stm32mp257f-ev1 board the USB_DRD port (CN15) is active only if USBPD_DRPSI_CM33_NonSecure_stripped.elf firmware is running.  I need to run a different firmware on M33 while using the USB_DRD port. Searching in board's DT I found the following part:&mlahb { intc_rpmsg: interrupt-controller@1 { compatible = "rpmsg,intc"; reg = <1 0>; #interrupt-cells = <1>; interrupt-controller; status = "okay"; }; i2c_rpmsg: i2c@2 { compatible = "rpmsg,i2c-controller"; reg = <2 0>; rpmsg,dev-id = "rpmsg_i2c"; #address-cells = <1>; #size-cells = <0>; status = "okay"; typec@35 { compatible = "st,stm32mp25-typec"; reg = <0x35>; interrupts-extended = <&intc_rpmsg 0>; status = "okay"; connector { compatible = "usb-c-connector"; label = "USB-C"; port { typec_ep: endpoint { remote-endpoint = <&dwc3_ep>; }; }; }; }; }; };So I'm thinking the point is that the typec@35 node is activated only when i2c_rpmesg is create

I am trying to measure voltages using the STM32MP157C's built-in ADC on channel 18 in differential mode, but keep getting wrong values. Linux kernel is 6.1.28.Here are the relevant bits from the Linux device tree:&pinctrl {    adc_pins_mx: adc_mx-0 {        pins {            pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC1_INP18 */                     <STM32_PINMUX('A', 5, ANALOG)>; /* ADC1_INN18 */        };    };};&adc1 {    status = "okay";    assigned-resolution-bits = <16>;    channel@18 {        reg = <18>;        diff-channels = <18 18>;       

Hello,we have an issue with a STM32MP1 and EMMC. The only boot source is SDMMC2 from eMMC-Flash.So far it works fine, but when we try to initiate a "reboot" in linux the system hangs and won't start again. If we do a reset in u-boot, there is no problem at all.Also, we have two boards. One board has an eMMC THGBMNG5D1LBAIL from Toshiba (is recommeded in errata sheet) and the other board is the eMMC SDINBDG4-8G from Sandisk. At both board the Software is the same and MPU is STM32MP151CAB3T REV Z. With the Toshiba eMMC the "reboot" works everytime and with the Sandisk eMMC we have the trouble.BR    

Working with STM32MP257F-DK + IMX335 camera + Quectel EG916Q-GL modem. Successfully recording to eMMC but facing image quality issues:Yellowish tint, Overexposure, White lines in recorded videoVideobalance settings (brightness=0.2, contrast=1.2, saturation=0.9) improve live preview but not the recorded output.Has anyone experienced similar issues or can recommend optimal IMX335 calibration settings for this hardware combination? Looking for solutions specific to recorded video quality.Thanks!

Hi all,I'm currently looking to get Trusted Firmware-M (TF-M) running on the Cortex-M33 core of an STM32MP257F-DK board. But I couldn't find an example for it.My plan is to adapt the existing TF-M port for the STM32MP257F-EV1 board as a reference. I'm specifically looking at the STMicroelectronics' TF-M GitHub repository https://github.com/STMicroelectronics/trusted-firmware-m/tree/v1.7.0-stm32mp25-w2441 (platform/ext/target/stm/stm32mp257f_ev1).I understand the DK board has some hardware differences from the EV1, particularly concerning the flash memory available to the M33 (the EV1 has S-NOR, while the DK product page mentions a "Macronix OctaFlash," which I assume is an OctoSPI NOR).Could anyone share any resources or general advice for when porting TF-M to the STM32MP257F-DK?

Hello, I would like to ask a question about the U-Boot USB enumeration of STM32MP157:Using a custom board with the STM32MP157 (FUSB302MPX), openSTlinux6.6,:Problem description:Through "STM32_Programmer_CLI -c port=usb1 -d ../../FIP_artifacts/arm-trusted-firmware/tf-a-stm32mp157d-develop_mp157-mx-optee-programmer-usb.stm32 0x1 -s 0x1 -d ../../FIP_artifacts/fip/fip-stm32mp157d-develop_mp157-mx-optee-programmer-usb.bin 0x3 -s 0x3"Write to the board memory, PC side"Error: Unable to reconnect the target device: time out expired, Error: Start operation failed" On the board: Repeat log "dwc2_ep0_setup: bRequestType = 0x80(IN), bRequest = 0x6 wLength = 0xff, wValue = 0x302, wIndex= 0x409"Attached is the device tree and uart log.

Hello,I have tried following the https://wiki.st.com/stm32mpu/wiki/STM32CubeProgrammer_OTP_management to achieve this.I have tried configuring CFG_BSEC_PTA=y CFG_STM32_BSEC_WRITE=y CFG_WITH_USER_TA=yinto the meta-st-stm32mp bsp and verified that it was being added to the make. I then did a minimal flashlayout to get to uboot. I have tried multiple setting/configs but I always get the same error when i run the command; STM32_Programmer_CLI -c port=usb1 -otp disploptee optee: TA_NVMEM invoke failed TEE err: ffff0006, err:0Error: OTP read issue -5dfu_read: Failed to fill bufferWhat is the one thing that I am missing here? My goal is to be able to flash word 3, 5, & 6. Any help would be appreciated, thank you. 

HelloI'm considering the requirements and learning process for designing a board with the STM32MP2.I've never done DDR4 routing before—what's the best starting point?Also, is it feasible to design such a board using a tool like KiCad, or is a tool like Altium essential?Thanks!

Hello Team,unable to download OpenSTLinux BSP package a tarball file named en.SOURCES-stm32mp2-openstlinux-6.6-yocto-scarthgap-mpu-v24.11.06.tar.gz  from the link (https://www.st.com/en/embedded-software/stm32mp2dev.html#get-software). Instead of BSP package (en.SOURCES-stm32mp2-openstlinux-6.6-yocto-scarthgap-mpu-v24.11.06.tar.gz ) there is a SDK package (en.SDK-x86_64-stm32mp2-openstlinux-6.6-yocto-scarthgap-mpu-v24.11.06.tar) in (MP2-DEV-x86 ) please find the screenshot attachment  and links...1. https://wiki.st.com/stm32mpu/wiki/STM32MPU_Developer_Package#Installing_the_OpenSTLinux_BSP_packages2. https://www.st.com/en/embedded-software/stm32mp2dev.html#get-software could you please help me in downloading.Thanks,vamshi kumar

HelloWe are currently attempting to boot both Cortex-A35 cores of the STM32MP257 processor using an SD card. While we have successfully verified that both cores function independently under bare-metal conditions, we are facing challenges in waking both cores during the SD card boot process.Specifically, we are attempting to release Core 1 from reset by setting the C1P1RST bit in the RCC_C1P1RSTCSETR register. However, we observe that the reset does not get released as expected—the value of the register does not reflect the release of the reset.We are following the sequence outlined in Section 3.4 "Cortex-A35 boot mode" of the STM32MP257 Reference Manual. In this context, we would appreciate further clarification on the following steps mentioned in the boot procedure:2. The core requests a warm reset through its internal reset management register in secure mode.3. Both cores enter in WFI state.We request a detailed explanation of the above two steps, particularly with regard to:The

I applied real-time patches to the Linux kernel, but when I measured the RT performance using rt-tests, I found that these two services were affecting it: "stm32mp-calibration.service" "stm32mp-calibration.timer." What is the reason for this?Is it appropriate to disable them?thanks~~

Hi,I have enabled iwdg2 in tf-a, uboot (PV="v2023.10-stm32mp-r1") , optee (version 4.0.0-stm32mp) and linux kernel(ver. v6.6-stm32mp) device trees for STM32MP133F. iwdg is enabled in non-secure world only.&iwdg2 { status = "okay"; /* USER CODE BEGIN iwdg2 */ timeout-sec = <60>; /* USER CODE END iwdg2 */ };When stopping in u-boot there are 2 scenarios that manifest as watchdog caused reset.1. First scenario is when the system is just stopped and inactive in u-boot.2. Second scenario is when running mtest in u-boot. (mtest writes and reads to addresses from 0xc0000000 to 0xc4000000; excluding the end address) With op-tee watchdog reset there is Panic stack unwind:E/TC:0 Panic 'Watchdog' at /usr/src/debug/optee-os-stm32mp/4.0.0-stm32mp-r1/core/drivers/stm32_iwdg.c:228 <stm32_iwdg_it_handler> E/TC:0 TEE load address @ 0xce000000 E/TC:0 Call stack: E/TC:0 0xce00a1d4 print_kernel_stack at /usr/src/debug/optee-os-stm32mp/4.0.0-stm32mp-r1/core/arch/arm/ker

 Hello everyone,I'm working on porting the PCMD3140IRTER codec to the Kirkstone BSP on an STM32MP13 platform. At the moment, I have connected only two microphones (presumably the left and right ones) to the PDMDIN1_GPI1 line.The microphones are Adafruit PDM MEMS, based on the MP34DTx chip. I verified their behavior using an oscilloscope, and the signals look correct according to the datasheet. So far, everything seems fine.The issue arises when I try to record audio using the following command:arecord -D hw:0,0 -f S16_LE -r 48000 -c 2 test.wavWhen I listen to the recorded file, I can hear only the left channel, as if the right microphone is not being captured. If I change the ti,pdm-edge-select property from:<0 1 0 1>to<1 0 1 0>I still hear only the left channel, but it now seems to come from the other microphone. So, it looks like only one microphone at a time is being used, and it's always recorded as the left channel, regardless of the pdm-edge-select setting.Additi

Hi,I am trying to test STM32MP257 hash hardware accelerator according to the following article: https://wiki.st.com/stm32mpu/wiki/Crypto_API_overview.I was able to utilize the crypto accelerator using openssl (as described in the article), but once I have tried running some tests with SHA-256 hash I have noticed that only software implementation was used. After checking the device tree, I have found that hash accelerator was not enabled. After enabling it and making sure that the kernel driver as also enabled (as module), I am seeing the following error during the boot:stm32-rifsc 42080000.bus: hash@42010000: Device driver will not be probedand again, the hash accelerator is not working.I am running all the tests above on the STM32MP257-DK. Am I doing something wrong?Thanks!Alexey.

Hi all,I'm currently running the Azure IoT Defender Micro Agent on a Yocto-based image (STM32MP1), and although the logs suggest the agent is working and sending data, no Defender metrics are visible in the Azure IoT Hub portal under Defender Metrics.Setup Details:Platform: STM32MP1 with Yocto LinuxTransport: AMQPIoT Hub connection: SuccessfulCloud messages: send_confirm_callback success and device twin updates with result 200Collectors enabled: SBoM, NetworkActivity, Heartbeat, LogCollector, Process, FileSystem, Peripheral, Baseline, etc.Observations:Logs show telemetry batching with message sizes up to 101KB.Agent attempts to read common paths like /etc/crontab fail with errno=[2] (file not found), which is expected given it's an embedded system.Repeated logs like Failed to stat() on=/proc/[pid]/cmdline, not sure if it's a blocker.Main Issue:Even though the agent appears to be collecting data and successfully sending messages, the Defender Metrics tab in the IoT Hub Portal remains em

Hi ST community!I am porting our Yocto bsp to the latest st scarthgap (openstlinux-6.6-yocto-scarthgap-mpu-v25.03.19) for our custom modules based on a stm32mp157c. When I source the Yocto SDK, the error is shown: [SDK ERROR] Issue to optee export-user_ta directory My main issue is that I cannot recompile optee (4.0.0-stm32mp-r1.2) outside of yocto: make PLATFORM=stm32mp1 CFG_EMBED_DTB_SOURCE_FILE=<our-devkit>.dts CFG_TEE_CORE_LOG_LEVEL=2 O=build all ... arm-poky-linux-gnueabi-ld.bfd: cannot find libgcc.a: No such file or directory I have tried to pass the sysroot on the command line (CFLAGS, LDFLAGS, ...) but nothing worked!What is missing during the SDK build?Is there a way to fix this temporarly on the command line?Thanks for the pointers!

I am conducting tests related to ThreadX using the 135 DK as a reference. I'm applying ThreadX-related content through Cube and testing it, but the thread doesn't exit from tx_thread_sleep. I've compared with the demo source and even followed the steps to register Tim6, but the problem persists. Is there a solution to this issue? I hope this helps! Let me know if you need further assistance.

I figured out how to build and integrate the Android kernel with my updated drivers. Unfortunately, my eval kit hangs at the ST splash screen before restarting after flashing my device.  I run the "flash-device" command mentioned in the wiki: How to populate boards for Android - stm32mpu without any errors. I attached a serial UART log from boot. The system hangs and reboots after the following lines: Starting kernel ... I/TC: Secondary CPU 1 initializing I/TC: Secondary CPU 1 switching to normal world boot Any advice? Thanks

Hi,for evaluation I'm running STLinux on a STM32MP257F-DK board currently.I found the Linux console is available on one of the USB-ports with the default configuration of that operating system.Quick question: is that Linux console also available on some plain UART-port for that development kit (or for the STM32MP25 in general)? If yes: which port is used?Thanks!

Is it possible to operate USB-C (CN15) and Mini-PCIE (CN13) on the STM32MP257F-EV1 board with end devices at the same time? For example: A USB-C 4 port hub is connected to the USB-C port and a WLAN card is connected to the PCIE port.The documentation says that this is not possible at the SAME time. I understand that because it is a combophy.In the figure MSv67526V2 on the page https://wiki.stmicroelectronics.cn/stm32mpu/wiki/COMBOPHY_internal_peripheral there is the Mode_sel pin which is probably for activating the two modes. So it should be possible to activate the corresponding mod with the software.If so, this is also supported in the Linux kernel.Thanks for an answer.

Hello everybody,For the past few days I am trying to setup up an external codec with STM32MP257F-EV1 dev board. The codec of choice is the Cirrus CS47L35 and I can find a driver for in in OpenSTLinux.With my STM32MP25 and SAI2 interface I want to operate in Master Mode with Clock-Out. Right now I only need to read data so the SAI2B is configured as synchronous slave for SAI2A. There is additional codec's I2C configuration interface which will be accessed by i2c8 peripherial. I've already identified needed pins and generated device tree:{ // root sound: sound { compatible = "audio-graph-card"; label = "CS47L35 audio-graph card"; routing = "Playback" , "mclk1", "Capture" , "mclk1"; dais = <&sai2b_port>; status = "okay"; }; sai2a_pins_mx: sai2a_mx-0 { pins { pinmux = <STM32_PINMUX('J', 3, AF3)>, /* SAI2_FS_A */ <STM32_PINMUX('J', 11, AF3)>, /* SAI2_SCK_A */ <STM32_PINMUX('J', 12, AF3)>, /* SAI2_SD_A */ <STM32_PINMUX('J', 13, AF3)>; /* SAI2_

Following the instructions here: https://wiki.st.com/stm32mpu/index.php/How_to_create_your_own_machineAnd then making a trivial devicetree modification (enabling I2C5 output) fails to build on a fresh yocto install (via the "distribution package").  I'm beginning to port code from a DK2 to a custom board, and creating a transitional package.The build slams right into the `flavorlist` mess in the optee make confs (specifically workspace/sources/optee-os-stm32mp/core/arch/arm/plat-stm32mp1/conf.mk) , ignoring the `CUBEMX_BOARD_DDR_SIZE = "512"` variables or anything else..Very frustrating to see all these hardcoded filenames when yocto is very aware of the actual device tree in use at buildtime... looks like maybe the intended `CFG_EXT_DTS` escape hatch is broken?Lots of previous posts have hit this problem, but on custom hardware, and with more significant DT changes.  I didn't touch the RAM or anything else other than have a default DK2 template MX project and then enable/"ok

Hi,we are realizing a project in which we show a splashscreen image during startup. This is done in uboot with the command "bmp display" by using the simple-panel and simple-framebuffer driver.This works fine until the kernel starts up to a certain point. Then the screen is cleared and moves to black until the kernel startup reaches a point by when psplash takes over the display output again. This "gap" between these two splash screen outputs is about 3 to 4 seconds. This dark display during startup doesn't look nice. So, I am asking if the is a method to leave the U-Boot splash screen completely active until the kernel DRM or the application is ready to take over the output.Is there anyone who has dealt with a similar problem and has an idea to solve this? Following is given:- STM32MP157- display is attached to LTDC- Kernel 5.4.56- U-Boot 2020-1 Best regards, HAL9000

I am using the STM32MP257F-DK board. By default, this board automatically boots when power is applied. If the wakeup button is held for about 15 seconds, the system powers off. A short press and release of the wakeup button generates an interrupt signal that can be used by the kernel.I would like to change this behavior with the following custom setup:When power or battery is applied, the board should not boot automatically.The system should only boot if the wakeup button is pressed and held for a defined time (around 3 seconds).After the system has booted, pressing and holding the wakeup button again for the same defined time (around 3 seconds) should trigger a power-off.A short press and release of the button should continue to generate an interrupt signal usable by the kernel.Based on the following documentation:https://wiki.st.com/stm32mpu/wiki/Power_overviewhttps://wiki.st.com/stm32mpu/wiki/STM32MP2_PWR_internal_peripheral#stm32mp21_PWR_a35_runtime_rifhttps://wiki.st.com/stm32mpu/