STM32MP157CA SPI1 Clock does not work

[DBaes.1]

We use the STM32MP157CA and the STM32CubeIDE and let the code generator generate a confiuration with the required modules. In our case the SPI1 on the pins (PZ0,PZ1,PZ2). The generated functions provide the initializations for the SPI1. Unfortunately the SPI1 does not work for us in normal operation mode. If we call the HAL_SPI_Transmit(...) function after the initialization we get a SPI timeout. On the oscilloscope we see no clock on the spi clock line. We also noticed that when we use the engineering mode for the M4 the SPI1 works.

If we change the SPI to the SPI5 (also generated with the code generator) everything works in normal operation mode and in engineering mode. How can we use the SPI1 in normal operation mode on the M4?

[PatrickF]

Hi,

did you update the complete DT from CubeIDE outputs ? See https://wiki.st.com/stm32mpu/wiki/How_to_compile_the_device_tree_with_the_Developer_Package

Linux should be aware of m4 resources (e.g. to start relevant clocks). See https://wiki.st.com/stm32mpu/wiki/How_to_assign_an_internal_peripheral_to_a_runtime_context

SPI5 works maybe because it is defined in default starter package or benefit from an already enabled shared clock.

Regards.

[DBaes.1]

We use the diff tool to get all required device tree options by compare the generated devicetree without SPI1 and with SPI1 enabled. We apply this changes with an path at our yocto build.

The difference looks like this:

diff --git a/CA7/DeviceTree/xyz/kernel/stm32mp157c-xyz.dts b/CA7/DeviceTree/xyz/kernel/stm32mp157c-xyz.dts
index 45cf88a..5e549e4 100644
--- a/CA7/DeviceTree/xyz/kernel/stm32mp157c-xyz.dts
+++ b/CA7/DeviceTree/xyz/kernel/stm32mp157c-xyz.dts
@@ -136,6 +136,14 @@
 &pinctrl_z {
 	u-boot,dm-pre-reloc;
 
+	m4_spi1_pins_z_mx: m4_spi1_mx-0 {
+		pins {
+			pinmux = <STM32_PINMUX('Z', 0, RSVD)>, /* SPI1_SCK */
+					 <STM32_PINMUX('Z', 1, RSVD)>, /* SPI1_MISO */
+					 <STM32_PINMUX('Z', 2, RSVD)>; /* SPI1_MOSI */
+		};
+	};
+
 	/* USER CODE BEGIN pinctrl_z */
 	/* USER CODE END pinctrl_z */
 };
@@ -234,6 +242,15 @@
 	/* USER CODE END m4_dma2 */
 };
 
+&m4_spi1{
+	pinctrl-names = "default";
+	pinctrl-0 = <&m4_spi1_pins_z_mx>;
+	status = "okay";
+};
+
 &m4_spi5{
 	pinctrl-names = "default";
 	pinctrl-0 = <&m4_spi5_pins_mx>;
diff --git a/CA7/DeviceTree/xyz/tf-a/stm32mp157c-xyz.dts b/CA7/DeviceTree/xyz/tf-a/stm32mp157c-xyz.dts
index 49c6302..75dee09 100644
--- a/CA7/DeviceTree/xyz/tf-a/stm32mp157c-xyz.dts
+++ b/CA7/DeviceTree/xyz/tf-a/stm32mp157c-xyz.dts
@@ -92,7 +92,7 @@
 		CLK_SDMMC12_DISABLED
 		CLK_STGEN_HSI
 		CLK_USBPHY_DISABLED
-		CLK_SPI2S1_DISABLED
+		CLK_SPI2S1_PLL3R
 		CLK_SPI2S23_DISABLED
 		CLK_SPI45_PCLK2
 		CLK_SPI6_DISABLED
@@ -116,6 +116,11 @@
 		CLK_LPTIM23_DISABLED
 		CLK_LPTIM45_DISABLED
 	>;
+	pll3:st,pll@2 {
+		compatible = "st,stm32mp1-pll";
+		reg = <2>;
+		cfg = < 3 24 1 1 1 PQR(0,0,1) >;
+	};
 	pll4:st,pll@3 {
 		compatible = "st,stm32mp1-pll";
 		reg = <3>;
@@ -142,6 +147,7 @@
 	/*"Mcu Isolation" peripherals*/
 	DECPROT(STM32MP1_ETZPC_CRC2_ID, DECPROT_MCU_ISOLATION, DECPROT_UNLOCK)
 	DECPROT(STM32MP1_ETZPC_DMA2_ID, DECPROT_MCU_ISOLATION, DECPROT_UNLOCK)
+	DECPROT(STM32MP1_ETZPC_SPI1_ID, DECPROT_MCU_ISOLATION, DECPROT_UNLOCK)
 	DECPROT(STM32MP1_ETZPC_SPI5_ID, DECPROT_MCU_ISOLATION, DECPROT_UNLOCK)
 	DECPROT(STM32MP1_ETZPC_TIM2_ID, DECPROT_MCU_ISOLATION, DECPROT_UNLOCK)
 	DECPROT(STM32MP1_ETZPC_USART2_ID, DECPROT_MCU_ISOLATION, DECPROT_UNLOCK)
diff --git a/CA7/DeviceTree/xyz/u-boot/stm32mp157c-xyz-u-boot.dtsi b/CA7/DeviceTree/xyz/u-boot/stm32mp157c-xyz-u-boot.dtsi
index 88fcdce..604e7ad 100644
--- a/CA7/DeviceTree/xyz/u-boot/stm32mp157c-xyz-u-boot.dtsi
+++ b/CA7/DeviceTree/xyz/u-boot/stm32mp157c-xyz-u-boot.dtsi
@@ -94,7 +94,7 @@
 		CLK_SDMMC12_DISABLED
 		CLK_STGEN_HSI
 		CLK_USBPHY_DISABLED
-		CLK_SPI2S1_DISABLED
+		CLK_SPI2S1_PLL3R
 		CLK_SPI2S23_DISABLED
 		CLK_SPI45_PCLK2
 		CLK_SPI6_DISABLED
@@ -118,6 +118,12 @@
 		CLK_LPTIM23_DISABLED
 		CLK_LPTIM45_DISABLED
 	>;
+	pll3:st,pll@2 {
+		compatible = "st,stm32mp1-pll";
+		reg = <2>;
+		cfg = < 3 24 1 1 1 PQR(0,0,1) >;
+		u-boot,dm-pre-reloc;
+	};
 	pll4:st,pll@3 {
 		compatible = "st,stm32mp1-pll";
 		reg = <3>;
diff --git a/CA7/DeviceTree/xyz/u-boot/stm32mp157c-xyz.dts b/CA7/DeviceTree/xyz/u-boot/stm32mp157c-xyz.dts
index f094748..217ac06 100644
--- a/CA7/DeviceTree/xyz/u-boot/stm32mp157c-xyz.dts
+++ b/CA7/DeviceTree/xyz/u-boot/stm32mp157c-xyz.dts
@@ -136,6 +136,14 @@
 &pinctrl_z {
 	u-boot,dm-pre-reloc;
 
+	m4_spi1_pins_z_mx: m4_spi1_mx-0 {
+		pins {
+			pinmux = <STM32_PINMUX('Z', 0, RSVD)>, /* SPI1_SCK */
+					 <STM32_PINMUX('Z', 1, RSVD)>, /* SPI1_MISO */
+					 <STM32_PINMUX('Z', 2, RSVD)>; /* SPI1_MOSI */
+		};
+	};
+
 	/* USER CODE BEGIN pinctrl_z */
 	/* USER CODE END pinctrl_z */
 };
@@ -234,6 +242,15 @@
 	/* USER CODE END m4_dma2 */
 };
 
+&m4_spi1{
+	pinctrl-names = "default";
+	pinctrl-0 = <&m4_spi1_pins_z_mx>;
+	status = "okay";
+};
+
 &m4_spi5{
 	pinctrl-names = "default";
 	pinctrl-0 = <&m4_spi5_pins_mx>;

Did we miss a function that was already active in the generated device tree with disabled SPI1?

[PatrickF]

Hi,

few toughts:

Your PLL3 settings sound strange, at least P divider should be enabled to use M4.

R post divider to 1 sound too high resulting frequency.

I would see more something like (P = 208.87793MHz, Q = 24.573874, R = 11.290699) to be tailored to your needs (CubeMx could help).

pll3:st,pll@2 {
		compatible = "st,stm32mp1-pll";
		reg = <2>;
		cfg = < 1 33 1 16 36 PQR(1,1,1) >;
		frac = < 0x1a04 >;
		u-boot,dm-pre-reloc;
	};

See also https://wiki.st.com/stm32mpu/wiki/Clock_device_tree_configuration_-_Bootloader_specific#Defining_peripheral_PLL_frequencies_with_st-2Cpll_property

Did you try to debug your FW to see why you get this timeout ?

With debugger, please check RCC_MC_APB2ENSETR.SPI1EN bit, RCC_SPI2S1CKSELR.SPI1SRC field.

We know that sometimes, when reloading M4 FW more than once (i.e. stop/start copro FW), some peripherals does not re-init well (as there is no reset on M4 side).

You could try adding these lines in the /* USER CODE BEGIN SysInit */ section of your main.c to force a reset of SPI1 settings before the M4 init it.

hspi1.Instance = SPI1;
 HAL_SPI_DeInit(&hspi1);
 HAL_SPI_MspDeInit(&hspi1);
 HAL_NVIC_DisableIRQ(SPI1_IRQn);
 __HAL_RCC_SPI1_FORCE_RESET();
 __HAL_RCC_SPI1_RELEASE_RESET();

Regards.