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May 13, 2024
Question

STM32MP157F-DK2 FMC cannot be configured in userspace.

  • May 13, 2024
  • 2 replies
  • 1813 views

I enabled fmc in arch/arm/boot/dts/stm32mp157f-dk2.dts:

&fmc {
	status = "okay";
};

And this is how i read or write its registers:

static inline unsigned int readl(const volatile void *addr)
{
	unsigned int val;
	__asm__ __volatile__("": : :"memory");
	val = *(volatile unsigned int *)addr;
	__asm__ __volatile__("": : :"memory");
	return val;
}

static inline void writel(unsigned int value, volatile void *addr)
{
	__asm__ __volatile__("": : :"memory");
	*(volatile unsigned int *)addr = value;
	__asm__ __volatile__("": : :"memory");
}
int main()
{
 fd = open ("/dev/mem", O_RDWR | O_SYNC);
 if(fd == 0)
 {
 DBG("open mem failed\n");
 return -1;
 }

 iobase = mmap(NULL, 0x1000, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0x58002000);
 if(iobase == MAP_FAILED)
 {
 DBG("iobase mmap failed\n");
 ret = -1;
 goto close_fd;
 }
 

 bcr0 = readl(iobase+FMC2_BCR(0));
 ...
 writel(bcr0, iobase+FMC2_BCR(0));
 ...
}

But I guess I did not read the proper values of its registers, which are all 0x000030db. And if I try to write it, it did not change its value.

 

I had tried to do the same thing on STM32MP157D-EV1, but it could read the correct value and my writings did work. 

 

Now I have to work on dk2 for some reasons, how can I configure it?

 

BTW, "cat /proc/iomem" will not print that range of mapped memory.

 

 

 

2 replies

PatrickF
Technical Moderator
May 17, 2024

Hi @MapleLin 

Maybe working on EV1 because the FMC is defined to be used for a NAND Flash.

https://github.com/STMicroelectronics/u-boot/blob/v2022.10-stm32mp/arch/arm/dts/stm32mp157f-ev1.dts#L363

Your enable of FMC is maybe not enough.

https://wiki.st.com/stm32mpu/wiki/FMC_device_tree_configuration#DT_configuration_-board_level-

See also clocking, if not used by any driver, Linux will not enable the IP clock.

https://wiki.st.com/stm32mpu/wiki/STM32MP15_clock_tree#Device_tree_2

Try also

cat /sys/kernel/debug/clk/clk_summary

Notice that FMC has multiple clocks (bus clock and a kernel clock). I think all should be enabled to access registers.

PatrickF_0-1715941232382.png

 

 

Regards

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MapleLinAuthor
Associate
May 21, 2024

Hi @PatrickF .

As I am working with 4.19 version of linux kernel, it is not enough to enable fmc in device tree. The driver will quit at probe function when no nand device detected. The registers will be unmapped then, that is why I cannot access its registers.

Regards

PatrickF
Technical Moderator
May 21, 2024

Hi,
As you are in development phase, we strongly recommend to use latest ecosystem v5.x.

Otherwise, you could refer to wiki ecosystem v1 archive (https://wiki.st.com/stm32mpu-ecosystem-v1/wiki/Main_Page). Please note that this ecosystem is not supported anymore by ST.

Regards,

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PatrickF
Technical Moderator
May 24, 2024

Hi,

I'm not SW expert, but starting latest ecosystem v5.x (I'm not sure for v4.x), you have the Linux PSRAM/NOR driver available (ebi.c).

see https://wiki.st.com/stm32mpu/wiki/FMC_internal_peripheral#Software_frameworks_and_drivers

and an example using an external SRAM like component (ksz8851, ethernet port on FMC) https://wiki.st.com/stm32mpu/wiki/FMC_device_tree_configuration#DT_configuration_of_the_external_bus_interface_controller_-board_level-

You have to seek only for a driver of your external device (or build your own if custom solution like FPGA).

If your external device is seen as memory mapped, I guess you could use MDMA for MEM2MEM transfert (using Linux DMA framework). Here I cannot help so much.

Regards,

 

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