What's the function of the pins property in device tree?

[Wechmarer]

I modified the device tree by a patch to disable HW flow control. It seems the port is still working as expected.

1. Why are the pins grouped by 'pins1' ... 'pinsN'? Is this just to apply the same settings to these pins?
2. Why can I remove some pins and RX is still RX and TX is still TX and not shifted because I removed an entry? How is this detected by the driver?

Here is my patch:

usart2_pins_c: usart2-2 {
 		pins1 {
-			pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */
-				 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
+			pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */
 			bias-disable;
 			drive-push-pull;
 			slew-rate = <3>;
 		};
 		pins2 {
-			pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
-				 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
+			pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
 			bias-disable;
 		};
 	};

[Erwan SZYMANSKI]

Hello @Wechmarer​ ,

You can fin some documentation concerning pinctrl and pins DT node in the wiki:

• https://wiki.st.com/stm32mpu/wiki/Pinctrl_overview
• https://wiki.st.com/stm32mpu/wiki/Pinctrl_device_tree_configuration

If you take a look at the stm32-usart driver, you will be able to find the different calls to the pinctrl framework and understand how does it works, in parallel with the precedent wiki links.

I hope that these links will help you to catch the utility of pins node.

Kind regards,

Erwan