Can STM32MP151 transfer sound via HDMI connector?

[DMårt]

I'm buildning my own computer by using STM32MP151AAC3.

I'm going to draw lines for the HDMI connector. I have one question: Can I transfer sound via the HDMI cable? For example if I run OpenSTLinux onto the STM32MP151AAC3 processor, and then I connect the HDMI cable and I can see the screen. Will I be able to hear sound too if I surf into Youtube?

[PatrickF]

Hi @DMårt 

note that performance of STM32MP151A as general purpose 'computer' might be deceptive. I think you could forget Youtube video thru HTML browsing (e.g. no high-resolution capable and only SW video decoder).

Anyway, no issue to output audio on HDMI, please refer to STM32MP157F-DK2 reference design.

Regards.

[DMårt]

@PatrickF 

Thank you for your reply.

I have no plats to have that STM32MP151AAC3 as a general purpose computer. But I have plans to have a GUI application onto it, written in C or C++ or Java.

Is that possible? 3D or 2D.

[PatrickF]

Hi,

no issue to have nice GUI with STM32MP151.

3D is possible, but without GPU and with single-core Cortex-A7, might not be best performances.

Regards.

[DMårt]

Hi @PatrickF 

Note! What you are refering to is not the HDMI PHY.

You refering to another IC chip.

The linux kernel does not support sii9022A without MCLK.

I get these debug messages from sii902x.c https://github.com/torvalds/linux/blob/master/drivers/gpu/drm/bridge/sii902x.c because my device requries MCLK. I have not routed that track from my MCU to the PHY. So sound won't work for the moment until sii902x.c supports PLL as a clock instead of only MCLK.

 

 

 if (daifmt->bit_clk_provider || daifmt->frame_clk_provider) {
 dev_dbg(dev, "%s: I2S clock provider mode not supported\n", __func__); <--------------------------
 return -EINVAL;
 }

 switch (daifmt->fmt) {
 case HDMI_I2S:
 i2s_config_reg |= SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES |
 SII902X_TPI_I2S_SD_JUSTIFY_LEFT;
 break;
 case HDMI_RIGHT_J:
 i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_RIGHT;
 break;
 case HDMI_LEFT_J:
 i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_LEFT;
 break;
 default:
 dev_dbg(dev, "%s: Unsupported i2s format %u\n", __func__, daifmt->fmt); <--------------------------------
 return -EINVAL;
 }

 

 

The device tree requries the mclk.

https://www.kernel.org/doc/Documentation/devicetree/bindings/display/bridge/sil%2Csii9022.yaml

 

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/bridge/sil,sii9022.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Silicon Image sii902x HDMI bridge

maintainers:
 - Boris Brezillon <[e-mail]>

properties:
 compatible:
 oneOf:
 - items:
 - enum:
 - sil,sii9022-cpi # CEC Programming Interface
 - sil,sii9022-tpi # Transmitter Programming Interface
 - const: sil,sii9022
 - const: sil,sii9022

 reg:
 maxItems: 1

 interrupts:
 maxItems: 1
 description: Interrupt line used to inform the host about hotplug events.

 reset-gpios:
 maxItems: 1

 iovcc-supply:
 description: I/O Supply Voltage (1.8V or 3.3V)

 cvcc12-supply:
 description: Digital Core Supply Voltage (1.2V)

 '#sound-dai-cells':
 enum: [ 0, 1 ]
 description: |
 <0> if only I2S or S/PDIF pin is wired,
 <1> if both are wired.
 HDMI audio is configured only if this property is found.
 If HDMI audio is configured, the sii902x device becomes an I2S and/or
 S/PDIF audio codec component (e.g. a digital audio sink), that can be
 used in configuring full audio devices with simple-card or
 audio-graph-card bindings. See their binding documents on how to describe
 the way the
 sii902x device is connected to the rest of the audio system:
 Documentation/devicetree/bindings/sound/simple-card.yaml
 Documentation/devicetree/bindings/sound/audio-graph-card.yaml
 Note: In case of the audio-graph-card binding the used port index should
 be 3.

 sil,i2s-data-lanes:
 $ref: /schemas/types.yaml#/definitions/uint32-array
 minItems: 1
 maxItems: 4
 uniqueItems: true
 items:
 enum: [ 0, 1, 2, 3 ]
 description:
 Each integer indicates which I2S pin is connected to which audio FIFO.
 The first integer selects the I2S audio pin for the first audio FIFO#0
 (HDMI channels 1&2), the second for FIFO#1 (HDMI channels 3&4), and so
 on. There are 4 FIFOs and 4 I2S pins (SD0 - SD3). Any I2S pin can be
 connected to any FIFO, but there can be no gaps. E.g. an I2S pin must be
 mapped to FIFO#0 and FIFO#1 before mapping a channel to FIFO#2. The
 default value is <0>, describing SD0 pin being routed to HDMI audio
 FIFO#0.

 clocks:
 maxItems: 1
 description: MCLK input. MCLK can be used to produce HDMI audio CTS values.

 clock-names:
 const: mclk

 ports:
 $ref: /schemas/graph.yaml#/properties/ports

 properties:
 port@0:
 $ref: /schemas/graph.yaml#/properties/port
 description: Parallel RGB input port

 port@1:
 $ref: /schemas/graph.yaml#/properties/port
 description: HDMI output port

 port@3:
 $ref: /schemas/graph.yaml#/properties/port
 description: Sound input port

required:
 - compatible
 - reg

additionalProperties: false

examples:
 - |
 i2c {
 #address-cells = <1>;
 #size-cells = <0>;

 hdmi-bridge@39 {
 compatible = "sil,sii9022";
 reg = <0x39>;
 reset-gpios = <&pioA 1 0>;
 iovcc-supply = <&v3v3_hdmi>;
 cvcc12-supply = <&v1v2_hdmi>;

 #sound-dai-cells = <0>;
 sil,i2s-data-lanes = < 0 1 2 >;
 clocks = <&mclk>;
 clock-names = "mclk";

 ports {
 #address-cells = <1>;
 #size-cells = <0>;

 port@0 {
 reg = <0>;
 bridge_in: endpoint {
 remote-endpoint = <&dc_out>;
 };
 };
 };
 };
 };

[DMårt]

Hi @PatrickF 

I have updated my DT.

Instead of ASoC Audio Graph Card, I'm using Simple Sound Card instead. It seems like I can get a hdmi-audio-codec and ha i2s-hifi...I don't know what they are doing.

 

/ { 
	hdmi:connector{
		compatible = "hdmi-connector";
		#sound-dai-cells = <0>;
		label = "hdmi";
		type = "a";

		port{
			hdmi_connector_in:endpoint{
				remote-endpoint = <&sii9022_out>;
			};
 hdmi_audio_out:endpoit{
				remote-endpoint= <&sii9022_tx_endpoint>;
			};
		};
	};
	
	sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "SII9022A HDMI";
		simple-audio-card,format = "i2s";
		simple-audio-card,widgets = "Speaker", "External Speaker";
		simple-audio-card,routing = "External Speaker", "LINE_OUT";
		simple-audio-card,bitclock-master = <&dailink0_master>;
		simple-audio-card,frame-master = <&dailink0_master>;
		
		simple-audio-card,cpu {
			sound-dai = <&i2s2>;
		};
		
		dailink0_master: simple-audio-card,codec {
			sound-dai = <&hdmi>;
		};
	};
};

&i2c4{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c4_pins_mx>;
	pinctrl-1 = <&i2c4_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN i2c4 */
	clocks = <&scmi_clk CK_SCMI_I2C4>;
	resets = <&scmi_reset RST_SCMI_I2C4>;
	i2c-scl-rising-time-ns = <185>;
	i2c-scl-falling-time-ns = <20>;
	clock-frequency = <400000>;
	/delete-property/ dmas;
	/delete-property/ dma-names;

 hdmi-transmitter@39{
		compatible = "sil,sii9022";
		reg = <0x39>;
		iovcc-supply = <&v3v3_hdmi>;
		cvcc12-supply = <&v1v2_hdmi>;
		reset-gpios = <&gpioe 8 GPIO_ACTIVE_LOW>;
		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
		interrupt-parent = <&gpiog>;
		#sound-dai-cells = <0>;
		sil,i2s-data-lanes = <0>;
		/*clocks = <&mclk>;
		clock-names = "mclk";*/
		status = "okay";

		ports{
			#address-cells = <1>;
			#size-cells = <0>;

			port@0{
				reg = <0>;

				sii9022_in:endpoint{
					remote-endpoint = <&ltdc_ep0_out>;
				};
			};

			port@1{
				reg = <1>;

				sii9022_out:endpoint{
					remote-endpoint = <&hdmi_connector_in>;
				};
			};

			port@3{
				reg = <3>;

				sii9022_tx_endpoint:endpoint{
					remote-endpoint = <&i2s2_endpoint>;
				};
			};
		};
	};
};

&i2s2{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2s2_pins_mx>;
	pinctrl-1 = <&i2s2_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN i2s2 */
	clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
	clock-names = "pclk", "i2sclk", "x8k", "x11k";

	i2s2_port:port{
		i2s2_endpoint:endpoint{
			remote-endpoint = <&sii9022_tx_endpoint>;
			dai-format = "i2s";
			mclk-fs = <256>;
		};
	};
	/* USER CODE END i2s2 */
};

 

 

[DMårt]

@PatrickF 

Hi!

I solved the problem. Now I can hear sound from my SII9022A PHY.

I did not use ASoC Graph Card, instead I used Simple Card inside Linux kernel.

I post the Linux Device Tree in case if some one in the future want to play some music through the SII9022A.

 

// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
/*
 * Copyright (C) 2024, STMicroelectronics - All Rights Reserved
 * Author: STM32CubeMX code generation for STMicroelectronics.
 */

/* For more information on Device Tree configuration, please refer to
 * https://wiki.st.com/stm32mpu/wiki/Category:Device_tree_configuration
 */

/dts-v1/;

#include <dt-bindings/pinctrl/stm32-pinfunc.h>
#include "stm32mp151.dtsi"
#include "stm32mp15xa.dtsi"
#include "stm32mp15xxac-pinctrl.dtsi"
#include "stm32mp15-m4-srm.dtsi"

/* USER CODE BEGIN includes */
#include "stm32mp15-scmi.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/mfd/st,stpmic1.h>
/* USER CODE END includes */

/ {
	model = "STMicroelectronics custom STM32CubeMX board - openstlinux-6.1-yocto-mickledore-mpu-v24.06.26";
	compatible = "st,stm32mp151a-stm32-computer-firmware-mx", "st,stm32mp151";

	memory@c0000000 {
		device_type = "memory";
		reg = <0xc0000000 0x20000000>;

		/* USER CODE BEGIN memory */
		/* USER CODE END memory */
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		/* USER CODE BEGIN reserved-memory */
		optee@de000000 {
			reg = <0xde000000 0x2000000>;
			no-map;
		};
		
		mcuram2:mcuram2@10000000{
			compatible = "shared-dma-pool";
			reg = <0x10000000 0x40000>;
			no-map;
		};

		vdev0vring0:vdev0vring0@10040000{
			compatible = "shared-dma-pool";
			reg = <0x10040000 0x1000>;
			no-map;
		};

		vdev0vring1:vdev0vring1@10041000{
			compatible = "shared-dma-pool";
			reg = <0x10041000 0x1000>;
			no-map;
		};

		vdev0buffer:vdev0buffer@10042000{
			compatible = "shared-dma-pool";
			reg = <0x10042000 0x4000>;
			no-map;
		};

		mcu_rsc_table:mcu-rsc-table@10048000{
			compatible = "shared-dma-pool";
			reg = <0x10048000 0x8000>;
			no-map;
		};

		mcuram:mcuram@30000000{
			compatible = "shared-dma-pool";
			reg = <0x30000000 0x40000>;
			no-map;
		};

		retram:retram@38000000{
			compatible = "shared-dma-pool";
			reg = <0x38000000 0x10000>;
			no-map;
		};
		/* USER CODE END reserved-memory */
	};

	/* USER CODE BEGIN root */
	aliases{
		ethernet0 = &ethernet0;
		serial0 = &uart4;
	};

	hdmi:connector{
		compatible = "hdmi-connector";
		#sound-dai-cells = <0>;
		label = "hdmi";
		type = "a";

		port{
			hdmi_connector_in:endpoint{
				remote-endpoint = <&sii9022_out>;
			};
			hdmi_audio_out:endpoit{
				remote-endpoint= <&sii9022_tx_endpoint>;
			};
		};
	};
	
	sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "SII9022A HDMI";
		simple-audio-card,format = "i2s";
		/*simple-audio-card,widgets = "Speaker", "External Speaker";
		simple-audio-card,routing = "External Speaker", "LINE_OUT";*/
		simple-audio-card,bitclock-master = <&dailink0_master>;
		simple-audio-card,frame-master = <&dailink0_master>;
		simple-audio-card,mclk-fs = <256>;
		
		dailink0_master: simple-audio-card,cpu {
			sound-dai = <&i2s2>;
		};
		
		simple-audio-card,codec {
			sound-dai = <&sii9022A>;
		};
	};
	
	config {
		u-boot,boot-led = "heartbeat";
		u-boot,error-led = "error";
		u-boot,mmc-env-partition = "u-boot-env";
		st,fastboot-gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
		st,stm32prog-gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
	};

	led{
		compatible = "gpio-leds";

		led-blue{
			label = "heartbeat";
			gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "timer"; /* Change from heartbeat -> timer */
			default-state = "off";
		};
		
		led-red {
			label = "error";
			gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};
	};
	
	vin:vin{
		compatible = "regulator-fixed";
		regulator-name = "vin";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};

	chosen{
		stdout-path = "serial0:115200n8";
	};
	/* USER CODE END root */

	clocks{

		/* USER CODE BEGIN clocks */
		clk_csi: clk-csi {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <4000000>;
		};

		clk_hse: clk-hse {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <24000000>;
		};

		clk_hsi: clk-hsi {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <64000000>;
		};

		clk_lse: clk-lse {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32768>;
		};

		clk_lsi: clk-lsi {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32000>;
		};
		/* USER CODE END clocks */
	};

}; /*root*/

&pinctrl {

	eth1_pins_mx: eth1_mx-0 {
		pins1 {
			pinmux = <STM32_PINMUX('A', 1, AF11)>, /* ETH1_RX_CLK */
					 <STM32_PINMUX('A', 7, AF11)>, /* ETH1_RX_CTL */
					 <STM32_PINMUX('B', 0, AF11)>, /* ETH1_RXD2 */
					 <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RXD0 */
					 <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RXD1 */
					 <STM32_PINMUX('H', 7, AF11)>; /* ETH1_RXD3 */
			bias-disable;
		};
		pins2 {
			pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH1_MDIO */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
		pins3 {
			pinmux = <STM32_PINMUX('B', 11, AF11)>, /* ETH1_TX_CTL */
					 <STM32_PINMUX('C', 1, AF11)>, /* ETH1_MDC */
					 <STM32_PINMUX('C', 2, AF11)>, /* ETH1_TXD2 */
					 <STM32_PINMUX('E', 2, AF11)>, /* ETH1_TXD3 */
					 <STM32_PINMUX('G', 4, AF11)>, /* ETH1_GTX_CLK */
					 <STM32_PINMUX('G', 5, AF11)>, /* ETH1_CLK125 */
					 <STM32_PINMUX('G', 13, AF11)>, /* ETH1_TXD0 */
					 <STM32_PINMUX('G', 14, AF11)>; /* ETH1_TXD1 */
			bias-disable;
			drive-push-pull;
			slew-rate = <2>;
		};
		pins4 {
			pinmux = <STM32_PINMUX('B', 5, AF0)>; /* ETH1_CLK */
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
	};

	eth1_sleep_pins_mx: eth1_sleep_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RX_CLK */
					 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
					 <STM32_PINMUX('A', 7, ANALOG)>, /* ETH1_RX_CTL */
					 <STM32_PINMUX('B', 0, ANALOG)>, /* ETH1_RXD2 */
					 <STM32_PINMUX('B', 5, ANALOG)>, /* ETH1_CLK */
					 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_TX_CTL */
					 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
					 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH1_TXD2 */
					 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RXD0 */
					 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RXD1 */
					 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH1_TXD3 */
					 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH1_GTX_CLK */
					 <STM32_PINMUX('G', 5, ANALOG)>, /* ETH1_CLK125 */
					 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_TXD0 */
					 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_TXD1 */
					 <STM32_PINMUX('H', 7, ANALOG)>; /* ETH1_RXD3 */
		};
	};

	hdmi_cec_pins_mx: hdmi_cec_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('B', 6, AF5)>; /* CEC */
			bias-disable;
			drive-open-drain;
			slew-rate = <0>;
		};
	};

	hdmi_cec_sleep_pins_mx: hdmi_cec_sleep_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* CEC */
		};
	};

	i2c1_pins_mx: i2c1_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
					 <STM32_PINMUX('D', 13, AF5)>; /* I2C1_SDA */
			bias-disable;
			drive-open-drain;
			slew-rate = <0>;
		};
	};

	i2c1_sleep_pins_mx: i2c1_sleep_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
					 <STM32_PINMUX('D', 13, ANALOG)>; /* I2C1_SDA */
		};
	};

	i2c4_pins_mx: i2c4_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('F', 14, AF4)>, /* I2C4_SCL */
					 <STM32_PINMUX('F', 15, AF4)>; /* I2C4_SDA */
			bias-disable;
			drive-open-drain;
			slew-rate = <0>;
		};
	};

	i2c4_sleep_pins_mx: i2c4_sleep_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C4_SCL */
					 <STM32_PINMUX('F', 15, ANALOG)>; /* I2C4_SDA */
		};
	};

	i2s2_pins_mx: i2s2_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('A', 9, AF5)>, /* I2S2_CK */
					 <STM32_PINMUX('B', 12, AF5)>, /* I2S2_WS */
					 <STM32_PINMUX('I', 3, AF5)>; /* I2S2_SDO */
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
	};

	i2s2_sleep_pins_mx: i2s2_sleep_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('A', 9, ANALOG)>, /* I2S2_CK */
					 <STM32_PINMUX('B', 12, ANALOG)>, /* I2S2_WS */
					 <STM32_PINMUX('I', 3, ANALOG)>; /* I2S2_SDO */
		};
	};

	ltdc_pins_mx: ltdc_mx-0 {
		pins1 {
			pinmux = <STM32_PINMUX('A', 3, AF14)>, /* LTDC_B5 */
					 <STM32_PINMUX('B', 1, AF14)>, /* LTDC_G0 */
					 <STM32_PINMUX('B', 8, AF14)>, /* LTDC_B6 */
					 <STM32_PINMUX('C', 0, AF14)>, /* LTDC_R5 */
					 <STM32_PINMUX('D', 8, AF14)>, /* LTDC_B7 */
					 <STM32_PINMUX('D', 9, AF14)>, /* LTDC_B0 */
					 <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */
					 <STM32_PINMUX('E', 6, AF14)>, /* LTDC_G1 */
					 <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */
					 <STM32_PINMUX('F', 10, AF14)>, /* LTDC_DE */
					 <STM32_PINMUX('G', 10, AF14)>, /* LTDC_B2 */
					 <STM32_PINMUX('G', 12, AF14)>, /* LTDC_B1 */
					 <STM32_PINMUX('H', 2, AF14)>, /* LTDC_R0 */
					 <STM32_PINMUX('H', 3, AF14)>, /* LTDC_R1 */
					 <STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */
					 <STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */
					 <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */
					 <STM32_PINMUX('H', 12, AF14)>, /* LTDC_R6 */
					 <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */
					 <STM32_PINMUX('H', 14, AF14)>, /* LTDC_G3 */
					 <STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */
					 <STM32_PINMUX('I', 0, AF14)>, /* LTDC_G5 */
					 <STM32_PINMUX('I', 1, AF14)>, /* LTDC_G6 */
					 <STM32_PINMUX('I', 2, AF14)>, /* LTDC_G7 */
					 <STM32_PINMUX('I', 4, AF14)>, /* LTDC_B4 */
					 <STM32_PINMUX('I', 9, AF14)>, /* LTDC_VSYNC */
					 <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LTDC_CLK */
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
	};

	ltdc_sleep_pins_mx: ltdc_sleep_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('A', 3, ANALOG)>, /* LTDC_B5 */
					 <STM32_PINMUX('B', 1, ANALOG)>, /* LTDC_G0 */
					 <STM32_PINMUX('B', 8, ANALOG)>, /* LTDC_B6 */
					 <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */
					 <STM32_PINMUX('D', 8, ANALOG)>, /* LTDC_B7 */
					 <STM32_PINMUX('D', 9, ANALOG)>, /* LTDC_B0 */
					 <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */
					 <STM32_PINMUX('E', 6, ANALOG)>, /* LTDC_G1 */
					 <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */
					 <STM32_PINMUX('F', 10, ANALOG)>, /* LTDC_DE */
					 <STM32_PINMUX('G', 7, ANALOG)>, /* LTDC_CLK */
					 <STM32_PINMUX('G', 10, ANALOG)>, /* LTDC_B2 */
					 <STM32_PINMUX('G', 12, ANALOG)>, /* LTDC_B1 */
					 <STM32_PINMUX('H', 2, ANALOG)>, /* LTDC_R0 */
					 <STM32_PINMUX('H', 3, ANALOG)>, /* LTDC_R1 */
					 <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */
					 <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */
					 <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */
					 <STM32_PINMUX('H', 12, ANALOG)>, /* LTDC_R6 */
					 <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */
					 <STM32_PINMUX('H', 14, ANALOG)>, /* LTDC_G3 */
					 <STM32_PINMUX('H', 15, ANALOG)>, /* LTDC_G4 */
					 <STM32_PINMUX('I', 0, ANALOG)>, /* LTDC_G5 */
					 <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */
					 <STM32_PINMUX('I', 2, ANALOG)>, /* LTDC_G7 */
					 <STM32_PINMUX('I', 4, ANALOG)>, /* LTDC_B4 */
					 <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */
					 <STM32_PINMUX('I', 10, ANALOG)>; /* LTDC_HSYNC */
		};
	};

	sdmmc2_pins_mx: sdmmc2_mx-0 {
		pins1 {
			pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
					 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
					 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
					 <STM32_PINMUX('B', 9, AF10)>, /* SDMMC2_D5 */
					 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
					 <STM32_PINMUX('C', 7, AF10)>, /* SDMMC2_D7 */
					 <STM32_PINMUX('E', 5, AF9)>; /* SDMMC2_D6 */
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
					 <STM32_PINMUX('E', 3, AF9)>, /* SDMMC2_CK */
					 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
			bias-pull-up;
			drive-push-pull;
			slew-rate = <1>;
		};
	};

	sdmmc2_opendrain_pins_mx: sdmmc2_opendrain_mx-0 {
		pins1 {
			pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
					 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
					 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
					 <STM32_PINMUX('B', 9, AF10)>, /* SDMMC2_D5 */
					 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
					 <STM32_PINMUX('C', 7, AF10)>, /* SDMMC2_D7 */
					 <STM32_PINMUX('E', 5, AF9)>; /* SDMMC2_D6 */
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
					 <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
			bias-pull-up;
			drive-push-pull;
			slew-rate = <1>;
		};
		pins3 {
			pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
			bias-pull-up;
			drive-open-drain;
			slew-rate = <1>;
		};
	};

	sdmmc2_sleep_pins_mx: sdmmc2_sleep_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
					 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
					 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
					 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC2_D5 */
					 <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
					 <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
					 <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC2_D7 */
					 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
					 <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
					 <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
		};
	};

	uart4_pins_mx: uart4_mx-0 {
		pins1 {
			pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
			bias-pull-up;
		};
		pins2 {
			pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
			bias-pull-up;
			drive-push-pull;
			slew-rate = <0>;
		};
	};

	uart4_idle_pins_mx: uart4_idle_mx-0 {
		pins1 {
			pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
			bias-pull-up;
		};
		pins2 {
			pinmux = <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */
			bias-pull-up;
		};
	};

	uart4_sleep_pins_mx: uart4_sleep_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('B', 2, ANALOG)>, /* UART4_RX */
					 <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */
			bias-pull-up;
		};
	};

	usb_otg_hs_pins_mx: usb_otg_hs_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* USB_OTG_HS_ID */
		};
	};

	usb_otg_hs_sleep_pins_mx: usb_otg_hs_sleep_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* USB_OTG_HS_ID */
		};
	};

	/* USER CODE BEGIN pinctrl */
	/* USER CODE END pinctrl */
};

&pinctrl_z {

	/* USER CODE BEGIN pinctrl_z */
	/* USER CODE END pinctrl_z */
};

&m4_rproc{
	status = "disabled";

	/* USER CODE BEGIN m4_rproc */
	resets = <&scmi_reset RST_SCMI_MCU>, <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>;
	reset-names = "mcu_rst", "hold_boot";
	/*/delete-property/ st,syscfg-holdboot;*/
	mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
	mbox-names = "vq0", "vq1", "shutdown", "detach";
	memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>, <&mcu_rsc_table>;
	interrupt-parent = <&exti>;
	interrupts = <68 1>;
	wakeup-source;
	/* USER CODE END m4_rproc */

	m4_system_resources{
		status = "disabled";

		/* USER CODE BEGIN m4_system_resources */
		/* USER CODE END m4_system_resources */
	};
};

&bsec{
	status = "okay";

	/* USER CODE BEGIN bsec */
	/* USER CODE END bsec */
};

&cec{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&hdmi_cec_pins_mx>;
	pinctrl-1 = <&hdmi_cec_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN cec */
	/* USER CODE END cec */
};

&dma1{
	status = "okay";

	/* USER CODE BEGIN dma1 */
	resets = <&scmi_reset RST_SCMI_MDMA>;
	/* USER CODE END dma1 */
};

&dma2{
	status = "disabled";

	/* USER CODE BEGIN dma2 */
	/* USER CODE END dma2 */
};

&dmamux1{
	status = "okay";

	dma-masters = <&dma1>;
	dma-channels = <8>;

	/* USER CODE BEGIN dmamux1 */
	/* USER CODE END dmamux1 */
};

&ethernet0{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&eth1_pins_mx>;
	pinctrl-1 = <&eth1_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN ethernet0 */
	phy-mode = "rgmii-id";
	max-speed = <1000>;
	phy-handle = <&phy0>;
	nvmem-cells = <&ethernet_mac_address>;
	nvmem-cell-names = "mac-address";

	mdio{
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,dwmac-mdio";

		phy0:ethernet-phy@0{
			reg = <0>;
		};
	};
	/* USER CODE END ethernet0 */
};

&hsem{
	status = "okay";

	/* USER CODE BEGIN hsem */
	/* USER CODE END hsem */
};

&i2c1{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c1_pins_mx>;
	pinctrl-1 = <&i2c1_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN i2c1 */
	/* USER CODE END i2c1 */
};

&i2c4{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c4_pins_mx>;
	pinctrl-1 = <&i2c4_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN i2c4 */
	clocks = <&scmi_clk CK_SCMI_I2C4>;
	resets = <&scmi_reset RST_SCMI_I2C4>;
	i2c-scl-rising-time-ns = <185>;
	i2c-scl-falling-time-ns = <20>;
	clock-frequency = <400000>;
	/delete-property/ dmas;
	/delete-property/ dma-names;

	sii9022A: hdmi-transmitter@39{
		compatible = "sil,sii9022";
		reg = <0x39>;
		iovcc-supply = <&v3v3_hdmi>;
		cvcc12-supply = <&v1v2_hdmi>;
		reset-gpios = <&gpioe 8 GPIO_ACTIVE_LOW>;
		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
		interrupt-parent = <&gpiog>;
		#sound-dai-cells = <0>;
		sil,i2s-data-lanes = <0>;
		/*clocks = <&mclk>;
		clock-names = "mclk";*/
		status = "okay";

		ports{
			#address-cells = <1>;
			#size-cells = <0>;

			port@0{
				reg = <0>;

				sii9022_in:endpoint{
					remote-endpoint = <&ltdc_ep0_out>;
				};
			};

			port@1{
				reg = <1>;

				sii9022_out:endpoint{
					remote-endpoint = <&hdmi_connector_in>;
				};
			};

			port@3{
				reg = <3>;

				sii9022_tx_endpoint:endpoint{
					remote-endpoint = <&i2s2_endpoint>;
				};
			};
		};
	};
	
	pmic:stpmic@33{
		compatible = "st,stpmic1";
		reg = <0x33>;
		/*interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;*/
		interrupts-extended = <&exti 55 IRQ_TYPE_EDGE_FALLING>;
		interrupt-controller;
		#interrupt-cells = <2>;
		status = "okay";

		regulators{
			compatible = "st,stpmic1-regulators";
			buck1-supply = <&vin>;
			buck2-supply = <&vin>;
			buck3-supply = <&vin>;
			buck4-supply = <&vin>;
			/*ldo1-supply = <&v3v3>;*/
			ldo2-supply = <&vin>;
			ldo3-supply = <&vdd_ddr>;
			ldo4-supply = <&vin>;
			ldo5-supply = <&vin>;
			ldo6-supply = <&v3v3>;
			vref_ddr-supply = <&vin>;
			/*boost-supply = <&vin>;
			pwr_sw1-supply = <&bst_out>;
			pwr_sw2-supply = <&bst_out>;*/

			vddcore:buck1{
				regulator-name = "vddcore";
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1350000>;
				regulator-always-on;
				regulator-initial-mode = <0>;
				regulator-over-current-protection;
			};

			vdd_ddr:buck2{
				regulator-name = "vdd_ddr";
				regulator-min-microvolt = <1350000>;
				regulator-max-microvolt = <1350000>;
				regulator-always-on;
				regulator-initial-mode = <0>;
				regulator-over-current-protection;
			};

			vdd:buck3{
				regulator-name = "vdd";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
				st,mask-reset;
				regulator-initial-mode = <0>;
				regulator-over-current-protection;
			};

			v3v3:buck4{
				regulator-name = "v3v3";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
				regulator-over-current-protection;
				regulator-initial-mode = <0>;
			};
			
			/*
			v1v8_audio:ldo1{
				regulator-name = "v1v8_audio";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
				interrupts = <IT_CURLIM_LDO1 0>;
			};*/

			v3v3_hdmi:ldo2{
				regulator-name = "v3v3_hdmi";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
				interrupts = <IT_CURLIM_LDO2 0>;
			};

			vtt_ddr:ldo3{
				regulator-name = "vtt_ddr";
				regulator-min-microvolt = <500000>;
				regulator-max-microvolt = <750000>;
				regulator-always-on;
				regulator-over-current-protection;
			};

			vdd_usb:ldo4{
				regulator-name = "vdd_usb";
				interrupts = <IT_CURLIM_LDO4 0>;
			};

			vdda:ldo5{
				regulator-name = "vdda";
				regulator-min-microvolt = <2900000>;
				regulator-max-microvolt = <2900000>;
				interrupts = <IT_CURLIM_LDO5 0>;
				regulator-boot-on;
			};

			v1v2_hdmi:ldo6{
				regulator-name = "v1v2_hdmi";
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1200000>;
				regulator-always-on;
				interrupts = <IT_CURLIM_LDO6 0>;
			};

			vref_ddr:vref-ddr{
				regulator-name = "vref_ddr";
				regulator-always-on;
			};

			/*
			bst_out:boost{
				regulator-name = "bst_out";
				interrupts = <IT_OCP_BOOST 0>;
			};

			vbus_otg:pwr-sw1{
				regulator-name = "vbus_otg";
				interrupts = <IT_OCP_OTG 0>;
			};

			vbus_sw:pwr-sw2{
				regulator-name = "vbus_sw";
				interrupts = <IT_OCP_SWOUT 0>;
				regulator-active-discharge = <1>;
			};
			*/
		};

		onkey{
			compatible = "st,stpmic1-onkey";
			interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
			interrupt-names = "onkey-falling", "onkey-rising";
			power-off-time-sec = <10>;
			status = "okay";
		};
	};
	/* USER CODE END i2c4 */
};

&i2s2{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2s2_pins_mx>;
	pinctrl-1 = <&i2s2_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN i2s2 */
	clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
	clock-names = "pclk", "i2sclk", "x8k", "x11k";

	i2s2_port:port{
		i2s2_endpoint:endpoint{
			remote-endpoint = <&sii9022_tx_endpoint>;
			dai-format = "i2s";
			mclk-fs = <256>;
		};
	};
	/* USER CODE END i2s2 */
};

&ltdc{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&ltdc_pins_mx>;
	pinctrl-1 = <&ltdc_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN ltdc */
	port{

		ltdc_ep0_out:endpoint{
			remote-endpoint = <&sii9022_in>;
		};
	};
	/* USER CODE END ltdc */
};

&m4_dma2{
	status = "okay";

	/* USER CODE BEGIN m4_dma2 */
	/* USER CODE END m4_dma2 */
};

&mdma1{
	status = "okay";

	/* USER CODE BEGIN mdma1 */
	/* USER CODE END mdma1 */
};

&pwr_regulators{
	status = "okay";

	/* USER CODE BEGIN pwr_regulators */
	vdd-supply = <&vdd>;
	vdd_3v3_usbfs-supply = <&vdd_usb>;
	/* USER CODE END pwr_regulators */
};

&rcc{
	status = "okay";

	/* USER CODE BEGIN rcc */
	compatible = "st,stm32mp1-rcc-secure", "syscon";
	clock-names = "hse", "hsi", "csi", "lse", "lsi";
	clocks = <&scmi_clk CK_SCMI_HSE>,
		 <&scmi_clk CK_SCMI_HSI>,
		 <&scmi_clk CK_SCMI_CSI>,
		 <&scmi_clk CK_SCMI_LSE>,
		 <&scmi_clk CK_SCMI_LSI>;
	/* USER CODE END rcc */
};

&rng1{
	status = "okay";

	/* USER CODE BEGIN rng1 */
	clocks = <&scmi_clk CK_SCMI_RNG1>;
	resets = <&scmi_reset RST_SCMI_RNG1>;
	/* USER CODE END rng1 */
};

&rtc{
	status = "okay";

	/* USER CODE BEGIN rtc */
	clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
	/* USER CODE END rtc */
};

&sdmmc2{
	pinctrl-names = "default", "opendrain", "sleep";
	pinctrl-0 = <&sdmmc2_pins_mx>;
	pinctrl-1 = <&sdmmc2_opendrain_pins_mx>;
	pinctrl-2 = <&sdmmc2_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN sdmmc2 */
	non-removable;
	no-sd;
	no-sdio;
	st,neg-edge;
	bus-width = <8>;
	vmmc-supply = <&v3v3>;
	vqmmc-supply = <&vdd>;
	mmc-ddr-3_3v;
	/* USER CODE END sdmmc2 */
};

&tamp{
	status = "okay";

	/* USER CODE BEGIN tamp */
	/* USER CODE END tamp */
};

&uart4{
	pinctrl-names = "default", "idle", "sleep";
	pinctrl-0 = <&uart4_pins_mx>;
	pinctrl-1 = <&uart4_idle_pins_mx>;
	pinctrl-2 = <&uart4_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN uart4 */
	/delete-property/ dmas;
	/delete-property/ dma-names;
	u-boot,dm-pre-reloc;
	/* USER CODE END uart4 */
};

&usbh_ehci{
	status = "okay";

	/* USER CODE BEGIN usbh_ehci */
	phys = <&usbphyc_port0>;
	#address-cells = <1>;
	#size-cells = <0>;
	/* onboard HUB */
	hub@1 {
		compatible = "usb424,2514";
		reg = <1>;
		vdd-supply = <&v3v3>;
	};
	/* USER CODE END usbh_ehci */
};

&usbh_ohci{
	status = "okay";

	/* USER CODE BEGIN usbh_ohci */
	/* USER CODE END usbh_ohci */
};

&usbotg_hs{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&usb_otg_hs_pins_mx>;
	pinctrl-1 = <&usb_otg_hs_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN usbotg_hs */
	phys = <&usbphyc_port1 0>;
	phy-names = "usb2-phy";
	usb-role-switch;
 u-boot,dm-pre-reloc; 
 u-boot,force-b-session-valid;
 hnp-srp-disable;
 dr_mode = "peripheral"; 
	/* USER CODE END usbotg_hs */
};

&usbphyc{
	status = "okay";

	/* USER CODE BEGIN usbphyc */
	phy-supply = <&vdd_usb>;
	/* USER CODE END usbphyc */
};

&usbphyc_port0{
	status = "okay";

	/* USER CODE BEGIN usbphyc_port0 */
	phy-supply = <&vdd_usb>;
	st,tune-hs-dc-level = <2>;
	st,enable-fs-rftime-tuning;
	st,enable-hs-rftime-reduction;
	st,trim-hs-current = <15>;
	st,trim-hs-impedance = <1>;
	st,tune-squelch-level = <3>;
	st,tune-hs-rx-offset = <2>;
	st,no-lsfs-sc;
	/* USER CODE END usbphyc_port0 */
};

&usbphyc_port1{
	status = "okay";

	/* USER CODE BEGIN usbphyc_port1 */
	phy-supply = <&vdd_usb>;
	st,tune-hs-dc-level = <2>;
	st,enable-fs-rftime-tuning;
	st,enable-hs-rftime-reduction;
	st,trim-hs-current = <15>;
	st,trim-hs-impedance = <1>;
	st,tune-squelch-level = <3>;
	st,tune-hs-rx-offset = <2>;
	st,no-lsfs-sc;
	/* USER CODE END usbphyc_port1 */
};

/* USER CODE BEGIN addons */
/*
&arm_wdt{
	timeout-sec = <32>;
	status = "okay";
};
*/
&cpu0 {
	cpu-supply = <&vddcore>;
	clocks = <&scmi_clk CK_SCMI_MPU>;
};

&uart4_pins_mx {
	u-boot,dm-pre-reloc;
	pins1 {
		u-boot,dm-pre-reloc;
	};
	pins2 {
		u-boot,dm-pre-reloc;
	};
};
&gpioz {
	clocks = <&scmi_clk CK_SCMI_GPIOZ>;
};
/* USER CODE END addons */