Enable ethernet clock on both A7 and M4

[fantasylsdo]

Dears,

I'm using STM32MP151 and have a uncertain quesion.

In my cases, Both A7 and M4 need to access the register ETH_MACSTSR and ETH_MACSTNR to get time stamp.

It's required to enable the ethernet clock on both side before accessing these registers, i.e. the bit7 in RCC_MP_AHB6ENCLRR and RCC_MC_AHB6ENCLRR.

It seems workable now. But I'm not sure whether it have any potential problem.

If this method is not practical, do you have any suggestions? 

Thanks

Regards,

 

 

 

 

[PatrickF]

Hi @fantasylsdo 

Yes, I assume you want to overcome the fact that Linux will stop the AHB bus clock going to ETH whenever no register access is needed on their side.

To do that, you could set ETHMACEN bit in RCC_MC_AHB6ENSETR to keep clock when Linux release the peripheral.

As you are accessing read-only registers, there is no potential issue foreseen (except if huge amount of read from MCU side could create real time issue on Linux driver when accessing ETH register).

Keep in mind that accessing a peripheral from two processors is not an usual use and should always be used with care.

Regards.

[fantasylsdo]

Thanks for your kind reply. It helps a lot.