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arck
Visitor II
November 30, 2023
Solved

FMC Specification change (rev 4 to rev 6): multiplexed vs extended modes

  • November 30, 2023
  • 1 reply
  • 2046 views

Hello,

We have designed our FMC interface using NOR Mode B multiplexed AD-Bus.

Checking the actual Revision 6

https://www.st.com/resource/en/reference_manual/DM00366355.pdf

reference manual this is not allowed, see Ch. 25.8.4 (Pg1365):

If the extended mode is enabled (EXTMOD bit is set in the FMC_BCRx register), up to four extended modes (A, B, C and D) are available. It is possible to mix A, B, C and D modes for read and write operations. For example, read operation can be performed in mode A and write in mode B. The extended mode is not compatible with the muxed mode (EXTMOD bit must be kept cleared in muxed mode).

 

This has changed from the time we have developed our interface. At that time the document had Revision 4. And this chapter does not contain the restriction in the last sentence as outlined above.

 

Can somebody explain the reason for the change?

What can happen if we keep this settings for the fmc2 the way we have designed it?

 

Thanks

 

    This topic has been closed for replies.
    Best answer by PatrickF

    HI @arck 

    change in RefMan seems only a clarification as all muxed modes was already listed with EXTMOD at 0.

    I'm not expert, but having EXTMOD = 0  in muxed mode make sense as address phase is common between read or write.

    We are not able to provide the behavior of FMC in muxed mode with EXTMOD = 1 as it was not tested.

    Could you please precise the issue you are facing ? Is it working but you fear having future issues or is there troubles in the read or write cycles ?

    If you are designing an FPGA in front of FMC, worth to look if you could change FPGA design or FMC settings to work with EXTMOD = 0.

    Regards.

    1 reply

    P
    PatrickFAnswer
    Technical Moderator
    December 12, 2023

    HI @arck 

    change in RefMan seems only a clarification as all muxed modes was already listed with EXTMOD at 0.

    I'm not expert, but having EXTMOD = 0  in muxed mode make sense as address phase is common between read or write.

    We are not able to provide the behavior of FMC in muxed mode with EXTMOD = 1 as it was not tested.

    Could you please precise the issue you are facing ? Is it working but you fear having future issues or is there troubles in the read or write cycles ?

    If you are designing an FPGA in front of FMC, worth to look if you could change FPGA design or FMC settings to work with EXTMOD = 0.

    Regards.

    A
    arckAuthor
    Visitor II
    February 2, 2024

    Thanks for the heads-up. Yes we have an FPGA and we changed the FMC interface now to the correct settings. We just missed this in our first implementation.

    BR

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