Help in creating a simple soundcard with I2S (or SAI if necessary)
Hi,
I'm working on creating a simple soundcard with a simple codec called pcm5102a which is a part of the kernel source. My board is the STM32MP135F-DK. I2S seems to be enough for this purpose however if you think that SAI will work better, then I'll take advice on that happily as well.
The current configuration is as in the attached audio_test.zip with I2S1 enabled and SPI1 Clock Mux set to PLL3Q instead of the default PLL4P (all set in the STM32CubeMX). The configuration is inserted into the build with a new machine and it does build without any problems. It's only after the boot that aplay -l doesn't list any soundcards, moreover below message is visible in the dmesg output:
[ 3.600504] st,stm32-i2s 44004000.audio-controller: Could not get x8k parent clock: -2
[ 3.607136] st,stm32-i2s: probe of 44004000.audio-controller failed with error -2
I read that the x8k is one of the clocks necessary for audio handling, however can't figure out how to fix that.
Below are the most important parts regarding the soundcard configuration:
/ { sound {
compatible = "audio-graph-card";
label = "STM32MP1-audio-test-card";
routing =
"Playback" , "MCLK"; /* Set a route between "MCLK" and "playback" DAPM widgets */
dais = <&i2s1_port>;
status = "okay";
};
};
&i2s1{
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2s1_pins_mx>;
pinctrl-1 = <&i2s1_sleep_pins_mx>;
status = "okay";
/* USER CODE BEGIN i2s1 */
#clock-cells = <0>;
clocks = <&rcc SPI1>, <&rcc SPI1_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
clock-names = "pclk", "i2sclk", "x8k", "x11k";
#sound-dai-cells = <1>;
i2s1_port: port {
#address-cells = <1>;
#size-cells = <0>;
i2s1_endpoint: endpoint {
system-clock-frequency = <48000>;
system-clock-direction-out;
frame-master;
bitclock-master;
format = "i2s";
mclk-fs = <256>;
remote-endpoint = <&codec_endpoint>;
};
};
codec: pcm5102a {
compatible = "ti,pcm5102a";
#sound-dai-cells = <0>;
clocks = <&i2s1>; /* The codec is a consumer of I2S2 master clock */
clock-names = "MCLK"; /* Feed MCLK codec clock with I2S2 master clock provider */
codec_port: pcm5102a_port {
codec_endpoint: endpoint{
remote-endpoint = <&i2s1_endpoint>;
};
};
};
/* USER CODE END i2s1 */
};
