how to deal with DDR pins if DDR not used on STM32MP13x series

[gingerologist]

We plan to design a stm32mp13x board equipped with 8MB psram using FMC interface as system RAM. It's going to be very slow but that's fine for our application, and standby power consumption is the topmost priority in this project.

 

How should we deal with all DDR related pins, including both power and signal? Can all VDDQ_DDR and DDR_VREF pins be left floating? Or these power supplies is mandatory, at least a LDO with a few milliamperes output capability required? And how about all addr/data signal? I assume it is safe to left those pins floating but expect an official confirmation for assurance.

[PatrickF]

Hi @gingerologist 

Not a classic use case. Performance would be affected (although L1 and L2 caches might help).

As the system always boot on FSBL (TF-A) without VDDQ_DDR supply, there is no issue to keep it off on your application.

You could keep VDDQ_DDR floating or grounded (recommended, using a 0 ohm, just in case). DDR_VREF could be left floating or grounded thru 240 ohms (recommended).

Btw, I assume you are doing bare-metal as running Linux on FMC RAM might need a lot of SW adaptation (if even working).

Regards.

[gingerologist]

Thank you so much for your advice and confirmation. And yes, the RAM size is too small for a linux system. We are going to develop a bare-metal solution.