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Visitor II
December 14, 2021
Solved

How to enter DDR interactive mode by defining CONFIG_STM32MP1_DDR_INTERACTIVE ?

  • December 14, 2021
  • 3 replies
  • 4579 views

I am using stm32MP157F-DK eval board (on windows) and I would like to try the DDR testing tool on cubeMX. But this is my first time trying to do so - I try to follow steps in "U-Boot SPL: DDR interactive mode" (url: https://wiki.st.com/stm32mpu/wiki/U-Boot_SPL:_DDR_int). It states i should define this mode under CONFIG_STM32MP1_DDR_INTERACTIVE - but I dont understand when or how should I do that? Should this be done on full flashlayout_st-image-*** or should i just have boot running?

    This topic has been closed for replies.
    Best answer by Kevin HUBER

    Hello @Arnas Celkys​ 

    Regarding the end of you question, it seems that you do not have the U-Boot sources in your developer package.

    Anyway, I will help you ;).

    Download Developer Package and U-Boot sources

    The first step to be able to modify the configuration of U-Boot, is to get the Developer package. Please follow this page: https://wiki.st.com/stm32mpu/wiki/STM32MP1_Developer_Package

    The part related to the install of U-Boot is: https://wiki.st.com/stm32mpu/wiki/STM32MP1_Developer_Package#Installing_the_U-Boot

    Follow the steps and untar the sources.

    Build U-Boot

    Once you got the sources, you have to go in the extracted folder and follow the “README_HOWTO.txt�? to build the sources.

    Modify configuration and enable DDR_INTERACTIVE

    Firstly, to modify the configuration you have to use in the U-Boot folder, the command “make menuconfig�? as explained on the wiki: https://wiki.st.com/stm32mpu/wiki/Menuconfig_or_how_to_configure_kernel

    CONFIG_STM32MP1_DDR_INTERACTIVE is not the easiest configuration to enable because it implies to have already enabled other configurations.

    The first things to do is search “DDR_INTERACTIVE�?. To realize a search in the menuconfig, you have to hit “/�? key and type the text that you search.

    A window like this appears:

    0693W00000HoWvWQAV.png 

    As you can see, “STM32MP1_DDR�? is set to [=n] because you have to enable “STM32MP1_DDR�? before being able to enable DDR_INTERACTIVE.

    So search “STM32MP1_DDR�? .

    0693W00000HoWwyQAF.pngYou see that you have to enable "OF_CONTROL" and "ARCH_STM32MP" before enabling your configuration

    So one more search, search for “OF_CONTROL�?

    0693W00000HoWxNQAV.png 

    You can hit the key “1�? to directly go where the config is located or you can search it inside "-> Device Tree Control"

    Enable the configuration. 

    0693W00000HoWxwQAF.png 

    Then to enable "ARCH_STM32MP", you have to change the architecture type from Sandbox to ARM.

    This can be done at the root of the menu:

    0693W00000HoWyQQAV.png 

    Select ARM architecture in the list.

    0693W00000HoWypQAF.png 

    Now, a new menu appears “ARM Architecture�?. Go inside and looks at “Target select�?.

    0693W00000HoX0HQAV.png Modify it to select “Support STMicroelectonics STM32MP Socs with cortex A�?

    0693W00000HoX0RQAV.png 

    Finally, you can search again “DDR_INTERACTIVE�? and you will see that you enabled the needed “STM32MP1_DDR�? !

    0693W00000HoX1KQAV.pngHit the key “1�? to go directly in the correct submenu or go in:

    Location:                                                                               │ 

     │    -> Device Drivers                                                                     │ 

        │      -> STM32MP1 DDR driver (STM32MP1_DDR [=y]) 

    And enable it.

    0693W00000HoX1ZQAV.png 

    The CONFIG_STM32MP1_DDR_INTERACTIVE configuration is now activated.

    Be careful to save your modifications.

    You can now rebuild the U-Boot sources with these configurations enabled, by following the "README.HOW_TO.txt".

    BUT doesn't apply again the default configuration by doing: make stm32mp15_<config>_defconfig

    Otherwise you will lose your modifications.

    Hope it helps you,

    Regards,

    Kevin

    In order to give better visibility on the answered topics, please click on 'Select as Best' on the reply which solved your issue or answered your question. See also 'Best Answers'

    3 replies

    Technical Moderator
    December 14, 2021

    Hello @Arnas Celkys​ 

    Regarding the end of you question, it seems that you do not have the U-Boot sources in your developer package.

    Anyway, I will help you ;).

    Download Developer Package and U-Boot sources

    The first step to be able to modify the configuration of U-Boot, is to get the Developer package. Please follow this page: https://wiki.st.com/stm32mpu/wiki/STM32MP1_Developer_Package

    The part related to the install of U-Boot is: https://wiki.st.com/stm32mpu/wiki/STM32MP1_Developer_Package#Installing_the_U-Boot

    Follow the steps and untar the sources.

    Build U-Boot

    Once you got the sources, you have to go in the extracted folder and follow the “README_HOWTO.txt�? to build the sources.

    Modify configuration and enable DDR_INTERACTIVE

    Firstly, to modify the configuration you have to use in the U-Boot folder, the command “make menuconfig�? as explained on the wiki: https://wiki.st.com/stm32mpu/wiki/Menuconfig_or_how_to_configure_kernel

    CONFIG_STM32MP1_DDR_INTERACTIVE is not the easiest configuration to enable because it implies to have already enabled other configurations.

    The first things to do is search “DDR_INTERACTIVE�?. To realize a search in the menuconfig, you have to hit “/�? key and type the text that you search.

    A window like this appears:

    0693W00000HoWvWQAV.png 

    As you can see, “STM32MP1_DDR�? is set to [=n] because you have to enable “STM32MP1_DDR�? before being able to enable DDR_INTERACTIVE.

    So search “STM32MP1_DDR�? .

    0693W00000HoWwyQAF.pngYou see that you have to enable "OF_CONTROL" and "ARCH_STM32MP" before enabling your configuration

    So one more search, search for “OF_CONTROL�?

    0693W00000HoWxNQAV.png 

    You can hit the key “1�? to directly go where the config is located or you can search it inside "-> Device Tree Control"

    Enable the configuration. 

    0693W00000HoWxwQAF.png 

    Then to enable "ARCH_STM32MP", you have to change the architecture type from Sandbox to ARM.

    This can be done at the root of the menu:

    0693W00000HoWyQQAV.png 

    Select ARM architecture in the list.

    0693W00000HoWypQAF.png 

    Now, a new menu appears “ARM Architecture�?. Go inside and looks at “Target select�?.

    0693W00000HoX0HQAV.png Modify it to select “Support STMicroelectonics STM32MP Socs with cortex A�?

    0693W00000HoX0RQAV.png 

    Finally, you can search again “DDR_INTERACTIVE�? and you will see that you enabled the needed “STM32MP1_DDR�? !

    0693W00000HoX1KQAV.pngHit the key “1�? to go directly in the correct submenu or go in:

    Location:                                                                               │ 

     │    -> Device Drivers                                                                     │ 

        │      -> STM32MP1 DDR driver (STM32MP1_DDR [=y]) 

    And enable it.

    0693W00000HoX1ZQAV.png 

    The CONFIG_STM32MP1_DDR_INTERACTIVE configuration is now activated.

    Be careful to save your modifications.

    You can now rebuild the U-Boot sources with these configurations enabled, by following the "README.HOW_TO.txt".

    BUT doesn't apply again the default configuration by doing: make stm32mp15_<config>_defconfig

    Otherwise you will lose your modifications.

    Hope it helps you,

    Regards,

    Kevin

    In order to give better visibility on the answered topics, please click on 'Select as Best' on the reply which solved your issue or answered your question. See also 'Best Answers'

    Visitor II
    December 14, 2021
    Error while parsing Rich Text Content
    Technical Moderator
    December 15, 2021

    Hello @Arnas Celkys​  ,

    I just saw that I provided you the complete procedure to activate the DDR_INTERACTIVE mode for the U-Boot, but I'm sorry because there was an easiest way as explained on the U-Boot SPL page:

    https://wiki.st.com/stm32mpu/wiki/U-Boot_SPL:_DDR_interactive_mode#DDR_interactive_mode

    It is possible to compile to force DDR_INTERACTIVE mode by adding DDR_INTERACTIVE=1 in the make option.

    So you just have to add DDR_INTERACTIVE=1 in your make command line.

    The option will be handled by the makefile : drivers/ram/stm32mp1/Makefile

    That will force the activation of : CONFIG_STM32MP1_DDR_INTERACTIVE_FORCE

    FIP

    Regarding FIP, it is normal that you do not have FIP partition because you are using a partition scheme to use an U-Boot SPL.

    I forgot that point during the previous answers.

    So I explained you how to generate an image with a FIP package which is the normal way to use the environment v3.1.0, but it was not related to your main question.

    DDR INTERACTIVE for U-Boot SPL

    To answer your main question, the only thing that you need to do to build your U-Boot SPL with DDR_INTERACTIVE is explained in the chapter 5 of this page (you must expand the chapter that is not displayed by default): https://wiki.st.com/stm32mpu/wiki/STM32MP15_U-Boot#SPL_compilation

    You have to use the basic config and not the trusted one:

    PC $> make stm32mp15_basic_defconfig

    and add the DDR_INTERACTIVE option in the make command:

    PC $> make DEVICE_TREE=stm32mp157c-dk2 DDR_INTERACTIVE=1 all

    And that's all!

    You obtain your two files:

    • u-boot-spl.stm32 : FSBL = SPL binary with STM32 image header, loaded by ROM code
    • u-boot.img : SSBL = U-Boot binary with U-Boot image header (uImage), loaded by SPL

    I'm sorry for all the other answers that were not really related to your main question, but at least, I hope that you learnt things about "make menuconfig" and "FIP package".

    Hope it helps you,

    Regards,

    Kevin

    Visitor II
    December 16, 2021

    It was brilliant tutorial and glad I had opportunity to learn about  "make menuconfig" and "FIP package" it it's very valuable knowledge! Thank you! :)

    Ok so now i have these files in my:<..>/sources/arm-ostl-linux-gnueabi/u-boot-stm32mp-v2020.10-stm32mp-r2-r0/build/stm32mp15_basic_defconfig/u-boot.img and

    <..>/sources/arm-ostl-linux-gnueabi/u-boot-stm32mp-v2020.10-stm32mp-r2-r0/build/stm32mp15_basic_defconfig/u-boot-spl.stm32. They are re-generated either using make "menuconfig" or just "make <board branch>". Now I have to upload them to the board and I will be able to access the "DDR mode" - and use the DDR test tools provided by ST. What alternatives of upload do I have? Is it only possible to see the FIP - directory by using the USB OTG connection - it is a bit problematic when using VM.... :?

    Visitor II
    December 16, 2021

    I have tried "How to populate the SD card with dd command" (url: https://wiki.st.com/stm32mpu/wiki/How_to_populate_the_SD_card_with_dd_command). But this requires the Distribution Package. Then I have followed the "https://wiki.st.com/stm32mpu/wiki/STM32MP1_Distribution_Package" to get the distribution package and got the following error to repo init ****. :

    repo init -u https://github.com/STMicroelectronics/oe-manifest.git -b refs/tags/openstlinux-5.10-dunfell-mp1-21-11-17

     File "/stm32mpu_workspace/ecosys-3.0/Distribution-Pack/openstlinux-5.10-dunfell-mp1-21-11-17/.repo/repo/main.py", line 79

      file=sys.stderr)

        ^

    SyntaxError: invalid syntax

    0693W00000Hopv1QAB.pngso feels like I am in some deep rabbit hole :grinning_face_with_sweat:

    Visitor II
    December 27, 2021

    **********************Summary of solved issues************************

    Huge thanks to, @Kevin HUBER​ , for all the help. If anybody will face similar issues I will just layout all the summary I did that helped me out.

    1. 1.Setting Linux on dedicated hardware rather than just VM - solved the issue of mass-storage not appearing on PC (when using VM) after the ums 0 mmc 0
    2. Updating Ubuntu to - 20.xx version solved the issue with SyntaxError: invalid syntax in SDcard population issues
    3. Always after selecting SDK make sure TF-A is installed - this solved the make or Makefile.sdk.all errors.
    4. Updating the boards current Flashlayout with trusted lates image from en.FLASH-stm32mp1-openstlinux-5-10-dunfell-mp1-21-11-17_tar_v3.1.0 - solved the missing FIP directory in U-boot interactive mode after command ums 0 mmc 0.

    Following the information provided by @Kevin HUBER​  and these basic steps, i finally managed to access DDR interactive mode and do the the test on my custom board - and i am glad to say that ir passed all the tests :)

    DDR test #0 (All) triggered with parameters: 1 128 0xC0000000

    DDR test result: Pass

    DDR test #1 (Simple DataBus) triggered with parameters: 0xC0000000

    DDR test result: Pass

    DDR test #2 (DataBusWalking0) triggered with parameters: 1 0xC0000000

    DDR test result: Pass

    DDR test #3 (DataBusWalking1) triggered with parameters: 1 0xC0000000

    DDR test result: Pass

    DDR test #4 (AddressBus) triggered with parameters: 4 0xC0000000

    DDR test result: Pass

    DDR test #5 (MemDevice) triggered with parameters: 4 0xC0000000

    DDR test result: Pass

    DDR test #6 (SimultaneousSwitchingOutput) triggered with parameters: 4 0xC0000000 

    DDR test result: Pass

    DDR test #7 (Noise) triggered with parameters: 0x00000000 0xC0000000

    DDR test result: Pass

    DDR test #8 (NoiseBurst) triggered with parameters: 128 0x00000000 0xC0000000

    DDR test result: Pass

    DDR test #9 (Random) triggered with parameters: 8 1 0xC0000000

    DDR test result: Pass

    DDR test #10 (FrequencySelectivePattern) triggered with parameters: 128 0xC0000000

    DDR test result: Pass

    DDR test #11 (BlockSequential) triggered with parameters: 4 1 0xC0000000

    DDR test result: Pass

    DDR test #12 (Checkerboard) triggered with parameters: 8 1 0xC0000000

    DDR test result: Pass

    DDR test #13 (BitSpread) triggered with parameters: 32 1 0xC0000000

    DDR test result: Pass

    DDR test #14 (BitFlip) triggered with parameters: 32 1 0xC0000000

    DDR test result: Pass

    DDR test #15 (WalkingOnes) triggered with parameters: 4 1 0xC0000000

    DDR test result: Pass

    DDR test #16 (WalkingZeroes) triggered with parameters: 4 1 0xC0000000

    DDR test result: Pass

    DDR test #17 (infinite read) triggered with parameters: 0xC0000000 0x00000000

    DDR test result: Pass

    DDR test #18 (infinite write) triggered with parameters: 0xC0000000 0x00000000

    DDR test result: Pass

    DDR test #20 (Check DQS timings margins)

    DDR test result: Pass