How to reduce CPU clock frequency on STM32MP157C?

[NGajic]

Hi,

I'm interested how to change CPU frequency from 650MHz to lower frequency. I looked those two links:

https://wiki.st.com/stm32mpu/wiki/How_to_change_the_CPU_frequency

https://wiki.st.com/stm32mpu/wiki/Clock_device_tree_configuration_-_Bootloader_specific

I went for PLL1 static configuration and added those lines to TF-A device tree, in RCC node

pll1: st,pll@0 {

 compatible = "st,stm32mp1-pll";

 reg = <0>;

 cfg = < 4 80 0 0 0 PQR(1,0,0) >;

 frac = < 0x800 >;

};

So If I'm right CPU freq should be: 24000000 / (4+1) * (80+1) = 388 800 000 = 388.8 Mhz.

I changed OPP nodes in tf-a device tree and Linux device tree to:

&cpu0_opp_table {

opp-388000000 {

opp-hz = /bits/ 64 <388000000>;

opp-microvolt = <1200000>;

opp-supported-hw = <0x1>;

};

};

When I wanted to boot the board I got this:

PANIC at PC : 0x2ffd7e53

Exception mode=0x00000016 at: 0x0000f295

What should I do to get lower CPU frequency?

Best regards,

Nenad

[NGajic]

I fixed pll1 node and now it looks like this:

pll1: st,pll@0 {

​

compatible = "st,stm32mp1-pll";

​

reg = <0>;

​

cfg = < 3 49 0 0 0 PQR(1,0,0) >;

​

frac = < 0x000 >;

​

};

So now I have cpu frequency of 400MHz. I also edited opp nodes in tf-a and Linux device tree to 400MHz. Now STM32MP157C booted successfully. Boot time is larger than 650MHz version as expected, but current consumption after boot is the same. How is this possible?

I will send result of measurements ​tommorow...

[PatrickF]

Hi,

Did you measure consumption on VDDCORE supply or supply of a complete platform (like STM32MP157C-DK2 5V USB power) ?

On a platform, there is many other contributors (e.g. display, STLINK, Ethernet, etc...) which could hide the CPU power gain.

Note that I expect that Linux go in WFI whenever possible (e.g. low CPU load), so change in CPU frequency does bring little or no gain as to do the same tasks, CPU will be active for longer time if frequency is lower.

As per datasheet, for 2xA7 Running Coremark (i.e. 100% CPU activity), the power difference between 650MHz and 400MHz is about 72mW typical while in WFI (CPU clock gated), the gain is in the range of 10mW between 650MHz and 400MHz.

Obviously, measurement on a complete Linux system would not show exactly these values as there is other activities on AXI, DDR, etc.. which depend as well on CPU frequency.

Significant power gain is by achieved by going to Stop or LPLV-Stop mode. See https://wiki.st.com/stm32mpu/wiki/How_to_define_your_low-power_strategy

Regards.

[NGajic]

We measured overall current consumption of our board. There was no difference in current draw (at the same voltage off course), when we watch boot sequence of 650MHz and 400MHz STM32MP1 (VDDCORE = 1.2V). So I tried to lower down VDDCORE to 1V. I modified tf-a device tree and set BUCK1 to 1V, done that for uBoot device tree and Linux device tree. Compiled everything and flashed SD card. STM32MP1 booted successfully and current dropped for about 20%. We launched our application which is using both Cortex M4 and A7 and everything worked just fine. We also tried low power mode entering and exit and everything was fine. Also the chip was for 6 to 8 degrees colder than the 650MHz, 1.2V (VDDCORE) version doing same job. I found in datasheet that minimum voltage for Run mode on VDDCORE is 1.18V. Is it okay for VDDCORE to be on 1V and what are the reasons for 1.18V minimum VDDCORE voltage?

Best regards,

Nenad

[Olivier GALLIEN]

Hi @NGajic​ ,

In which condition are you doing you measure ?

Since opp mode on 157C does not allow you to reduce the input voltage, impact on consumption is actually limited and likely measurable only on high loaded system.

Olivier