Hi,
You could assign FMC to M4 and use it to connect an external SRAM (not SDRAM nor DDR), but due to async domain crossing and no cache on M4 side, performance would be quite poor for code storage (read: not usable). Might be suitable to store data, e.g. using DMA.
Note: for SW point of view, Cortex-M4 does not have direct access to Linux DDR (Although, performance from M4 would be poor as well as with many potential hurdle and performance impact for Linux), but maybe your project could be split differently to make more use of Linux for memory intensive tasks.
Btw, did you know this big source of information : https://wiki.st.com/stm32mpu/wiki/Main_Page ?
Regards.