level sensitive IRQ on GPIO

[FHill]

Hello,

I am using the ST32MP157c-dk2. I want to adapt the mcp2518xxfd driver the bsp. The driver uses a level sensitive irq on a gpio. Since I have not been able to configure a level sensitive irq, I tried it edge sensitive. But this configuration fails after a while. I guess because the mcp2518 does not assert its irq line again (stays low). Is there a way to configure a level sensitive on a gpio?

regards 

Florian Hillen

[Uwe Bonnes]

I do not see a possibility for a level sensitive GPIO IRQ. What about checking the level at the end of the interrupt routine again?

[FHill]

Hello, thanks for you quick response. That seems to work well. Since I am working with a threaded irq routine, by logic, a missing irq can only happen, if the line is not de-asserted. So this should do it. Thanks.

[PatrickF]

External interrupts are mostly intended for HW event, so edge triggered only (rising/falling/both).

In your case, you could think looping in your 'clear external component interrupt source' interrupt routine until you see an opposite edge detection or an inactive level on the GPIO pin.

Don't know if SW wise it is easily doable on Linux, but certainly ok on M4 side.

[Martin Devera]

I'd like assure myself - external level interrupts are unsupported by MP1 ? Thus each (external irq) linux driver using IRQF_TRIGGER_HIGH/LOW must be edited ?

Just to be sure, external IRQ can come only via EXTI and then via it_exti_per signals to GIC. Thus I need at least one

from RTSR or FTSR in EXTI to be set. When both are 0, no IRQ continues to GIC. Correct ?

There is "exti[15:0] O EXTI output port to trigger other IPs." signal group described in RM, where does it go to ?

Thanks Martin